3 files changed, 4 insertions, 5 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_texstate.c b/src/mesa/drivers/dri/i915/i830_texstate.c
index 73ab55e6d40..f186faca09d 100644
--- a/src/mesa/drivers/dri/i915/i830_texstate.c
+++ b/src/mesa/drivers/dri/i915/i830_texstate.c
@@ -150,7 +150,7 @@ i830_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
 
    drm_intel_bo_reference(intelObj->mt->region->bo);
    i830->state.tex_buffer[unit] = intelObj->mt->region->bo;
-   pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
+   pitch = intelObj->mt->region->pitch;
 
    /* XXX: This calculation is probably broken for tiled images with
     * a non-page-aligned offset.
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c b/src/mesa/drivers/dri/i915/i915_texstate.c
index 94a8e5522ec..2f3286920d5 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -141,7 +141,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
    struct intel_texture_object *intelObj = intel_texture_object(tObj);
    struct gl_texture_image *firstImage;
    struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit);
-   GLuint *state = i915->state.Tex[unit], format, pitch;
+   GLuint *state = i915->state.Tex[unit], format;
    GLint lodbias, aniso = 0;
    GLubyte border[4];
    GLfloat maxlod;
@@ -169,7 +169,6 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
 
    format = translate_texture_format(firstImage->TexFormat,
 				     tObj->DepthMode);
-   pitch = intelObj->mt->region->pitch * intelObj->mt->cpp;
 
    state[I915_TEXREG_MS3] =
       (((firstImage->Height - 1) << MS3_HEIGHT_SHIFT) |
@@ -187,7 +186,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint unit, GLuint ss3)
     */
    maxlod = MIN2(sampler->MaxLod, tObj->_MaxLevel - tObj->BaseLevel);
    state[I915_TEXREG_MS4] =
-      ((((pitch / 4) - 1) << MS4_PITCH_SHIFT) |
+      ((((intelObj->mt->region->pitch / 4) - 1) << MS4_PITCH_SHIFT) |
        MS4_CUBE_FACE_ENA_MASK |
        (U_FIXED(CLAMP(maxlod, 0.0, 11.0), 2) << MS4_MAX_LOD_SHIFT) |
        ((firstImage->Depth - 1) << MS4_VOLUME_DEPTH_SHIFT));
diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c
index e78dbc8f13f..91fde5587f9 100644
--- a/src/mesa/drivers/dri/i915/i915_vtbl.c
+++ b/src/mesa/drivers/dri/i915/i915_vtbl.c
@@ -531,7 +531,7 @@ i915_set_buf_info_for_region(uint32_t *state, struct intel_region *region,
    state[1] = buffer_id;
 
    if (region != NULL) {
-      state[1] |= BUF_3D_PITCH(region->pitch * region->cpp);
+      state[1] |= BUF_3D_PITCH(region->pitch);
 
       if (region->tiling != I915_TILING_NONE) {
 	 state[1] |= BUF_3D_TILED_SURFACE;