diff options
Diffstat (limited to 'src/mesa/drivers/dri/i915')
-rw-r--r-- | src/mesa/drivers/dri/i915/i830_context.h | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i830_vtbl.c | 29 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_context.h | 8 | ||||
-rw-r--r-- | src/mesa/drivers/dri/i915/i915_vtbl.c | 30 |
4 files changed, 73 insertions, 2 deletions
diff --git a/src/mesa/drivers/dri/i915/i830_context.h b/src/mesa/drivers/dri/i915/i830_context.h index a298c1407de..1bdb32049d7 100644 --- a/src/mesa/drivers/dri/i915/i830_context.h +++ b/src/mesa/drivers/dri/i915/i830_context.h @@ -57,7 +57,13 @@ #define I830_DESTREG_SR0 7 #define I830_DESTREG_SR1 8 #define I830_DESTREG_SR2 9 -#define I830_DEST_SETUP_SIZE 10 +#define I830_DESTREG_DRAWRECT0 10 +#define I830_DESTREG_DRAWRECT1 11 +#define I830_DESTREG_DRAWRECT2 12 +#define I830_DESTREG_DRAWRECT3 13 +#define I830_DESTREG_DRAWRECT4 14 +#define I830_DESTREG_DRAWRECT5 15 +#define I830_DEST_SETUP_SIZE 16 #define I830_CTXREG_STATE1 0 #define I830_CTXREG_STATE2 1 diff --git a/src/mesa/drivers/dri/i915/i830_vtbl.c b/src/mesa/drivers/dri/i915/i830_vtbl.c index 3c9851e63fc..3b3ff2bceda 100644 --- a/src/mesa/drivers/dri/i915/i830_vtbl.c +++ b/src/mesa/drivers/dri/i915/i830_vtbl.c @@ -513,6 +513,16 @@ i830_emit_state(struct intel_context *intel) OUT_BATCH(state->Buffer[I830_DESTREG_SR0]); OUT_BATCH(state->Buffer[I830_DESTREG_SR1]); OUT_BATCH(state->Buffer[I830_DESTREG_SR2]); + + if (intel->constant_cliprect) { + assert(state->Buffer[I830_DESTREG_DRAWRECT0] != MI_NOOP); + OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT0]); + OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT1]); + OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT2]); + OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT3]); + OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT4]); + OUT_BATCH(state->Buffer[I830_DESTREG_DRAWRECT5]); + } ADVANCE_BATCH(); } @@ -592,6 +602,7 @@ i830_state_draw_region(struct intel_context *intel, struct intel_region *depth_region) { struct i830_context *i830 = i830_context(&intel->ctx); + GLcontext *ctx = &intel->ctx; GLuint value; ASSERT(state == &i830->state || state == &i830->meta); @@ -644,6 +655,24 @@ i830_state_draw_region(struct intel_context *intel, } state->Buffer[I830_DESTREG_DV1] = value; + if (intel->constant_cliprect) { + state->Buffer[I830_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO; + state->Buffer[I830_DESTREG_DRAWRECT1] = 0; + state->Buffer[I830_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */ + state->Buffer[I830_DESTREG_DRAWRECT3] = + (ctx->DrawBuffer->Width & 0xffff) | + (ctx->DrawBuffer->Height << 16); + state->Buffer[I830_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */ + state->Buffer[I830_DESTREG_DRAWRECT5] = 0; + } else { + state->Buffer[I830_DESTREG_DRAWRECT0] = MI_NOOP; + state->Buffer[I830_DESTREG_DRAWRECT1] = MI_NOOP; + state->Buffer[I830_DESTREG_DRAWRECT2] = MI_NOOP; + state->Buffer[I830_DESTREG_DRAWRECT3] = MI_NOOP; + state->Buffer[I830_DESTREG_DRAWRECT4] = MI_NOOP; + state->Buffer[I830_DESTREG_DRAWRECT5] = MI_NOOP; + } + I830_STATECHANGE(i830, I830_UPLOAD_BUFFERS); diff --git a/src/mesa/drivers/dri/i915/i915_context.h b/src/mesa/drivers/dri/i915/i915_context.h index a2376e50e15..87bbf5f9271 100644 --- a/src/mesa/drivers/dri/i915/i915_context.h +++ b/src/mesa/drivers/dri/i915/i915_context.h @@ -65,7 +65,13 @@ #define I915_DESTREG_SR0 9 #define I915_DESTREG_SR1 10 #define I915_DESTREG_SR2 11 -#define I915_DEST_SETUP_SIZE 12 +#define I915_DESTREG_DRAWRECT0 12 +#define I915_DESTREG_DRAWRECT1 13 +#define I915_DESTREG_DRAWRECT2 14 +#define I915_DESTREG_DRAWRECT3 15 +#define I915_DESTREG_DRAWRECT4 16 +#define I915_DESTREG_DRAWRECT5 17 +#define I915_DEST_SETUP_SIZE 18 #define I915_CTXREG_STATE4 0 #define I915_CTXREG_LI 1 diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index 7431a9cf76d..e79c955d64d 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -399,6 +399,17 @@ i915_emit_state(struct intel_context *intel) OUT_BATCH(state->Buffer[I915_DESTREG_SR0]); OUT_BATCH(state->Buffer[I915_DESTREG_SR1]); OUT_BATCH(state->Buffer[I915_DESTREG_SR2]); + + if (intel->constant_cliprect) { + assert(state->Buffer[I915_DESTREG_DRAWRECT0] != MI_NOOP); + OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT0]); + OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT1]); + OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT2]); + OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT3]); + OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT4]); + OUT_BATCH(state->Buffer[I915_DESTREG_DRAWRECT5]); + } + ADVANCE_BATCH(); } @@ -521,6 +532,7 @@ i915_state_draw_region(struct intel_context *intel, struct intel_region *depth_region) { struct i915_context *i915 = i915_context(&intel->ctx); + GLcontext *ctx = &intel->ctx; GLuint value; ASSERT(state == &i915->state || state == &i915->meta); @@ -573,6 +585,24 @@ i915_state_draw_region(struct intel_context *intel, } state->Buffer[I915_DESTREG_DV1] = value; + if (intel->constant_cliprect) { + state->Buffer[I915_DESTREG_DRAWRECT0] = _3DSTATE_DRAWRECT_INFO; + state->Buffer[I915_DESTREG_DRAWRECT1] = 0; + state->Buffer[I915_DESTREG_DRAWRECT2] = 0; /* xmin, ymin */ + state->Buffer[I915_DESTREG_DRAWRECT3] = + (ctx->DrawBuffer->Width & 0xffff) | + (ctx->DrawBuffer->Height << 16); + state->Buffer[I915_DESTREG_DRAWRECT4] = 0; /* xoff, yoff */ + state->Buffer[I915_DESTREG_DRAWRECT5] = 0; + } else { + state->Buffer[I915_DESTREG_DRAWRECT0] = MI_NOOP; + state->Buffer[I915_DESTREG_DRAWRECT1] = MI_NOOP; + state->Buffer[I915_DESTREG_DRAWRECT2] = MI_NOOP; + state->Buffer[I915_DESTREG_DRAWRECT3] = MI_NOOP; + state->Buffer[I915_DESTREG_DRAWRECT4] = MI_NOOP; + state->Buffer[I915_DESTREG_DRAWRECT5] = MI_NOOP; + } + I915_STATECHANGE(i915, I915_UPLOAD_BUFFERS); } |