diff options
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/blorp/meson.build | 37 | ||||
| -rw-r--r-- | src/intel/common/meson.build | 44 | ||||
| -rw-r--r-- | src/intel/compiler/meson.build | 155 | ||||
| -rw-r--r-- | src/intel/genxml/meson.build | 59 | ||||
| -rw-r--r-- | src/intel/isl/meson.build | 105 | ||||
| -rw-r--r-- | src/intel/meson.build | 31 | ||||
| -rw-r--r-- | src/intel/tools/meson.build | 39 | ||||
| -rw-r--r-- | src/intel/vulkan/meson.build | 182 |
8 files changed, 652 insertions, 0 deletions
diff --git a/src/intel/blorp/meson.build b/src/intel/blorp/meson.build new file mode 100644 index 00000000000..9241535fd20 --- /dev/null +++ b/src/intel/blorp/meson.build @@ -0,0 +1,37 @@ +# Copyright © 2017 Intel Corporation + +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: + +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. + +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +files_libblorp = files( + 'blorp.c', + 'blorp.h', + 'blorp_blit.c', + 'blorp_clear.c', + 'blorp_nir_builder.h', + 'blorp_genX_exec.h', + 'blorp_priv.h', +) + +libblorp = static_library( + 'blorp', + [files_libblorp, nir_opcodes_h], + include_directories : [inc_common, inc_intel], + c_args : [c_vis_args, no_override_init_args], + build_by_default : false, +) diff --git a/src/intel/common/meson.build b/src/intel/common/meson.build new file mode 100644 index 00000000000..90068ee7e5d --- /dev/null +++ b/src/intel/common/meson.build @@ -0,0 +1,44 @@ +# Copyright © 2017 Intel Corporation + +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: + +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. + +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +# TODO: android? + +files_libintel_common = files( + 'gen_clflush.h', + 'gen_debug.c', + 'gen_debug.h', + 'gen_decoder.c', + 'gen_decoder.h', + 'gen_device_info.c', + 'gen_device_info.h', + 'gen_l3_config.c', + 'gen_l3_config.h', + 'gen_urb_config.c', + 'gen_sample_positions.h', +) + +libintel_common = static_library( + ['intel_common', genX_xml_h], + files_libintel_common, + include_directories : [inc_common, inc_intel], + c_args : [c_vis_args, no_override_init_args], + dependencies : dep_libdrm, + build_by_default : false, +) diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build new file mode 100644 index 00000000000..e12fa22cf1b --- /dev/null +++ b/src/intel/compiler/meson.build @@ -0,0 +1,155 @@ +# Copyright © 2017 Intel Corporation + +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: + +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. + +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +libintel_compiler_files = files( + 'brw_cfg.cpp', + 'brw_cfg.h', + 'brw_clip.h', + 'brw_clip_line.c', + 'brw_clip_point.c', + 'brw_clip_tri.c', + 'brw_clip_unfilled.c', + 'brw_clip_util.c', + 'brw_compile_clip.c', + 'brw_compile_sf.c', + 'brw_compiler.c', + 'brw_compiler.h', + 'brw_dead_control_flow.cpp', + 'brw_dead_control_flow.h', + 'brw_disasm.c', + 'brw_eu.c', + 'brw_eu_compact.c', + 'brw_eu_defines.h', + 'brw_eu_emit.c', + 'brw_eu.h', + 'brw_eu_util.c', + 'brw_eu_validate.c', + 'brw_fs_builder.h', + 'brw_fs_cmod_propagation.cpp', + 'brw_fs_combine_constants.cpp', + 'brw_fs_copy_propagation.cpp', + 'brw_fs.cpp', + 'brw_fs_cse.cpp', + 'brw_fs_dead_code_eliminate.cpp', + 'brw_fs_generator.cpp', + 'brw_fs.h', + 'brw_fs_live_variables.cpp', + 'brw_fs_live_variables.h', + 'brw_fs_lower_conversions.cpp', + 'brw_fs_lower_pack.cpp', + 'brw_fs_nir.cpp', + 'brw_fs_reg_allocate.cpp', + 'brw_fs_register_coalesce.cpp', + 'brw_fs_saturate_propagation.cpp', + 'brw_fs_sel_peephole.cpp', + 'brw_fs_surface_builder.cpp', + 'brw_fs_surface_builder.h', + 'brw_fs_validate.cpp', + 'brw_fs_visitor.cpp', + 'brw_inst.h', + 'brw_interpolation_map.c', + 'brw_ir_allocator.h', + 'brw_ir_fs.h', + 'brw_ir_vec4.h', + 'brw_nir.h', + 'brw_nir.c', + 'brw_nir_analyze_boolean_resolves.c', + 'brw_nir_analyze_ubo_ranges.c', + 'brw_nir_attribute_workarounds.c', + 'brw_nir_intrinsics.c', + 'brw_nir_opt_peephole_ffma.c', + 'brw_nir_tcs_workarounds.c', + 'brw_packed_float.c', + 'brw_predicated_break.cpp', + 'brw_reg.h', + 'brw_reg_type.c', + 'brw_reg_type.h', + 'brw_schedule_instructions.cpp', + 'brw_shader.cpp', + 'brw_shader.h', + 'brw_vec4_builder.h', + 'brw_vec4_cmod_propagation.cpp', + 'brw_vec4_copy_propagation.cpp', + 'brw_vec4.cpp', + 'brw_vec4_cse.cpp', + 'brw_vec4_dead_code_eliminate.cpp', + 'brw_vec4_generator.cpp', + 'brw_vec4_gs_visitor.cpp', + 'brw_vec4_gs_visitor.h', + 'brw_vec4.h', + 'brw_vec4_live_variables.cpp', + 'brw_vec4_live_variables.h', + 'brw_vec4_nir.cpp', + 'brw_vec4_gs_nir.cpp', + 'brw_vec4_reg_allocate.cpp', + 'brw_vec4_surface_builder.cpp', + 'brw_vec4_surface_builder.h', + 'brw_vec4_tcs.cpp', + 'brw_vec4_tcs.h', + 'brw_vec4_tes.cpp', + 'brw_vec4_tes.h', + 'brw_vec4_visitor.cpp', + 'brw_vec4_vs_visitor.cpp', + 'brw_vec4_vs.h', + 'brw_vue_map.c', + 'brw_wm_iz.cpp', + 'gen6_gs_visitor.cpp', + 'gen6_gs_visitor.h', + 'intel_asm_annotation.c', + 'intel_asm_annotation.h', +) + +brw_nir_trig = custom_target( + 'brw_nir_trig_workarounds.c', + input : 'brw_nir_trig_workarounds.py', + output : 'brw_nir_trig_workarounds.c', + command : [prog_python2, '@INPUT@', '-p', + join_paths(meson.source_root(), 'src/compiler/nir/')], + depend_files : files('../../compiler/nir/nir_algebraic.py'), + capture : true, +) + +libintel_compiler = static_library( + 'intel_compiler', + [libintel_compiler_files, brw_nir_trig, nir_opcodes_h, nir_builder_opcodes_h, + ir_expression_operation_h], + include_directories : [inc_common, inc_intel, inc_nir], + c_args : [c_vis_args, no_override_init_args], + cpp_args : [cpp_vis_args], + build_by_default : false, +) + +if with_tests + # The last two tests are not C++ or gtest, pre comment in autotools make + foreach t : ['fs_cmod_propagation', 'fs_copy_propagation', + 'fs_saturate_propagation', 'vf_float_conversions', + 'vec4_register_coalesce', 'vec4_copy_propagation', + 'vec4_cmod_propagation', 'eu_compact', 'eu_validate'] + _exe = executable( + [t, nir_opcodes_h, ir_expression_operation_h], + 'test_@[email protected]'.format(t), + include_directories : [inc_common, inc_intel], + link_with : [libgtest, libintel_compiler, libintel_common, libnir, + libmesa_util, libisl], + dependencies : [dep_thread, dep_dl], + ) + test(t, _exe) + endforeach +endif diff --git a/src/intel/genxml/meson.build b/src/intel/genxml/meson.build new file mode 100644 index 00000000000..30c0d8bf2f6 --- /dev/null +++ b/src/intel/genxml/meson.build @@ -0,0 +1,59 @@ +# Copyright © 2017 Intel Corporation + +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: + +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. + +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +gen_xml_files = [ + 'gen4.xml', + 'gen45.xml', + 'gen5.xml', + 'gen6.xml', + 'gen7.xml', + 'gen75.xml', + 'gen8.xml', + 'gen9.xml', + 'gen10.xml', +] + +genX_xml_h = custom_target( + 'genX_xml.h', + input : ['gen_zipped_file.py', gen_xml_files], + output : 'genX_xml.h', + command : [prog_python2, '@INPUT@'], + capture : true, +) + +genX_bits_h = custom_target( + 'genX_bits.h', + input : ['gen_bits_header.py', gen_xml_files], + output : 'genX_bits.h', + command : [prog_python2, '@INPUT@', '-o', '@OUTPUT@'], +) + +gen_xml_pack = [] +foreach f : gen_xml_files + _name = '@0@_pack.h'.format(f.split('.')[0]) + _xml = custom_target( + _name, + input : ['gen_pack_header.py', f], + output : _name, + command : [prog_python2, '@INPUT@'], + capture : true, + ) + gen_xml_pack += _xml +endforeach diff --git a/src/intel/isl/meson.build b/src/intel/isl/meson.build new file mode 100644 index 00000000000..789175e2564 --- /dev/null +++ b/src/intel/isl/meson.build @@ -0,0 +1,105 @@ +# Copyright © 2017 Intel Corporation + +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: + +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. + +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +isl_gen_files = files( + 'isl_emit_depth_stencil.c', + 'isl_surface_state.c', +) + +isl_gen4_files = files( + 'isl_gen4.c', + 'isl_gen4.h', +) + +isl_gen6_files = files( + 'isl_gen6.c', + 'isl_gen6.h', +) + +isl_gen7_files = files( + 'isl_gen7.c', + 'isl_gen7.h', +) + +isl_gen8_files = files( + 'isl_gen8.c', + 'isl_gen8.h', +) + +isl_gen9_files = files( + 'isl_gen9.c', + 'isl_gen9.h', +) + +isl_gen_libs = [] +foreach g : [['40', isl_gen4_files], ['50', []], ['60', isl_gen6_files], + ['70', isl_gen7_files], ['75', []], ['80', isl_gen8_files], + ['90', isl_gen9_files], ['100', []]] + _gen = g[0] + _sources = g[1] + _lib = static_library( + 'libisl_gen@0@'.format(_gen), + [_sources, isl_gen_files, gen_xml_pack], + include_directories : [inc_common, inc_intel], + c_args : [c_vis_args, no_override_init_args, + '-DGEN_VERSIONx10=@0@'.format(_gen)], + build_by_default : false, + ) + isl_gen_libs += _lib +endforeach + +isl_format_layout_c = custom_target( + 'isl_format_layout.c', + input : ['gen_format_layout.py', 'isl_format_layout.csv'], + output : 'isl_format_layout.c', + command : [prog_python2, '@INPUT0@', '--csv', '@INPUT1@', '--out', '@OUTPUT@'], +) + +libisl_files = files( + 'isl.c', + 'isl.h', + 'isl_drm.c', + 'isl_genX_priv.h', + 'isl_format.c', + 'isl_priv.h', + 'isl_storage_image.c', +) + +libisl = static_library( + 'isl', + [libisl_files, isl_format_layout_c, genX_bits_h], + include_directories : [inc_common, inc_intel, inc_drm_uapi], + link_with : isl_gen_libs, + c_args : [c_vis_args, no_override_init_args], + build_by_default : false, +) + +if with_tests + isl_surf_get_image_offset_test = executable( + 'isl_surf_get_image_offset_test', + 'tests/isl_surf_get_image_offset_test.c', + dependencies : dep_m, + include_directories : [inc_common, inc_intel], + link_with : [libisl, libintel_common], + build_by_default : false, + ) + + test('isl_surf_get_imaage_offset', isl_surf_get_image_offset_test) +endif diff --git a/src/intel/meson.build b/src/intel/meson.build new file mode 100644 index 00000000000..57676082c9d --- /dev/null +++ b/src/intel/meson.build @@ -0,0 +1,31 @@ +# Copyright © 2017 Intel Corporation + +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: + +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. + +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +inc_intel = include_directories('.') + +subdir('blorp') +subdir('genxml') +subdir('common') +subdir('isl') +subdir('compiler') +subdir('tools') +if with_intel_vk + subdir('vulkan') +endif diff --git a/src/intel/tools/meson.build b/src/intel/tools/meson.build new file mode 100644 index 00000000000..91092fdb512 --- /dev/null +++ b/src/intel/tools/meson.build @@ -0,0 +1,39 @@ +# Copyright © 2017 Intel Corporation + +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: + +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. + +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +aubinator = executable( + 'aubinator', + files('aubinator.c', 'disasm.c', 'gen_disasm.h', 'intel_aub.h'), + dependencies : [dep_expat, dep_zlib, dep_dl, dep_thread, dep_m], + include_directories : [inc_common, inc_intel], + link_with : [libintel_common, libintel_compiler, libmesa_util], + c_args : [c_vis_args, no_override_init_args], + build_by_default : false, +) + +aubinator_error_decode = executable( + 'aubinator_error_decode', + files('aubinator_error_decode.c', 'disasm.c', 'gen_disasm.h'), + dependencies : [dep_expat, dep_zlib, dep_thread], + include_directories : [inc_common, inc_intel], + link_with : [libintel_common, libintel_compiler, libmesa_util], + c_args : [c_vis_args, no_override_init_args], + build_by_default : false, +) diff --git a/src/intel/vulkan/meson.build b/src/intel/vulkan/meson.build new file mode 100644 index 00000000000..9f0ee558e8a --- /dev/null +++ b/src/intel/vulkan/meson.build @@ -0,0 +1,182 @@ +# Copyright © 2017 Intel Corporation + +# Permission is hereby granted, free of charge, to any person obtaining a copy +# of this software and associated documentation files (the "Software"), to deal +# in the Software without restriction, including without limitation the rights +# to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +# copies of the Software, and to permit persons to whom the Software is +# furnished to do so, subject to the following conditions: + +# The above copyright notice and this permission notice shall be included in +# all copies or substantial portions of the Software. + +# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +# AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +# OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +# SOFTWARE. + +anv_entrypoints = custom_target( + 'anv_entrypoints.[ch]', + input : ['anv_entrypoints_gen.py', vk_api_xml, vk_android_native_buffer_xml], + output : ['anv_entrypoints.h', 'anv_entrypoints.c'], + command : [prog_python2, '@INPUT0@', '--xml', '@INPUT1@', + '--xml', '@INPUT2@', '--outdir', meson.current_build_dir()], + depend_files : files('anv_extensions.py'), +) + +anv_extensions_c = custom_target( + 'anv_extensions.c', + input : ['anv_extensions.py', vk_api_xml, vk_android_native_buffer_xml], + output : 'anv_extensions.c', + command : [prog_python2, '@INPUT0@', '--xml', '@INPUT1@', + '--xml', '@INPUT2@', '--out', '@OUTPUT@'], +) + +intel_icd = custom_target( + 'intel_icd', + input : 'anv_icd.py', + output : 'intel_icd.@[email protected]'.format(target_machine.cpu()), + command : [prog_python2, '@INPUT@', + '--lib-path', join_paths(get_option('prefix'), get_option('libdir')), + '--out', '@OUTPUT@'], + depend_files : files('anv_extensions.py'), + build_by_default : true, + install_dir : with_vulkan_icd_dir, + install : true, +) + +# TODO: workaround for anv_entrypoints combining the .h and .c files in it's +# output. See issue #2346 +block_entrypoints = custom_target( + 'block_entrypoints', + command : [prog_touch, '@OUTPUT@'], + output : 'null', + depends : anv_entrypoints, +) + +libanv_gen_libs = [] +anv_gen_files = files( + 'genX_blorp_exec.c', + 'genX_cmd_buffer.c', + 'genX_gpu_memcpy.c', + 'genX_pipeline.c', + 'genX_query.c', + 'genX_state.c', +) +foreach g : [['70', ['gen7_cmd_buffer.c']], ['75', ['gen7_cmd_buffer.c']], + ['80', ['gen8_cmd_buffer.c']], ['90', ['gen8_cmd_buffer.c']], + ['100', ['gen8_cmd_buffer.c']]] + _gen = g[0] + _files = g[1] + _lib = static_library( + 'libanv_gen@0@'.format(_gen), + [anv_gen_files, _files, block_entrypoints, nir_opcodes_h], + include_directories : [inc_common, inc_compiler, inc_drm_uapi, inc_intel, + inc_vulkan_util, inc_vulkan_wsi], + c_args : [c_vis_args, no_override_init_args, '-msse2', + '-DGEN_VERSIONx10=@0@'.format(_gen)], + dependencies : [dep_libdrm, dep_valgrind], + ) + libanv_gen_libs += _lib +endforeach + +libanv_files = files( + 'anv_allocator.c', + 'anv_batch_chain.c', + 'anv_blorp.c', + 'anv_cmd_buffer.c', + 'anv_debug_report.c', + 'anv_descriptor_set.c', + 'anv_device.c', + 'anv_dump.c', + 'anv_formats.c', + 'anv_genX.h', + 'anv_image.c', + 'anv_intel.c', + 'anv_nir.h', + 'anv_nir_apply_pipeline_layout.c', + 'anv_nir_lower_input_attachments.c', + 'anv_nir_lower_multiview.c', + 'anv_nir_lower_push_constants.c', + 'anv_pass.c', + 'anv_pipeline.c', + 'anv_pipeline_cache.c', + 'anv_private.h', + 'anv_queue.c', + 'anv_util.c', + 'anv_wsi.c', + 'vk_format_info.h', +) + +anv_deps = [] +anv_flags = [] + +if with_platform_x11 + anv_deps += dep_xcb_dri3 + anv_flags += [ + '-DVK_USE_PLATFORM_XCB_KHR', + '-DVK_USE_PLATFORM_XLIB_KHR', + ] + libanv_files += files('anv_wsi_x11.c') +endif + +if with_platform_wayland + anv_deps += dep_wayland_client + anv_flags += '-DVK_USE_PLATFORM_WAYLAND_KHR' + libanv_files += files('anv_wsi_wayland.c') +endif + +libanv_common = static_library( + 'anv_common', + [libanv_files, anv_entrypoints, anv_extensions_c, nir_opcodes_h], + include_directories : [inc_common, inc_intel, inc_compiler, inc_drm_uapi, + inc_vulkan_util, inc_vulkan_wsi], + c_args : [c_vis_args, no_override_init_args, '-msse2', anv_flags], + dependencies : [dep_valgrind], +) + +libvulkan_intel = shared_library( + 'vulkan_intel', + [files('anv_gem.c'), block_entrypoints], + include_directories : [inc_common, inc_intel, inc_compiler, inc_drm_uapi, + inc_vulkan_util, inc_vulkan_wsi], + link_whole : [libanv_common, libanv_gen_libs], + link_with : [libintel_compiler, libintel_common, libisl, libisl, libblorp, + libvulkan_util, libvulkan_wsi, libnir, libmesa_util], + dependencies : [dep_libdrm, dep_thread, dep_dl, dep_m, anv_deps, dep_valgrind], + c_args : [c_vis_args, no_override_init_args, '-msse2', anv_flags], + link_args : ['-Wl,--build-id=sha1', ld_args_bsymbolic, ld_args_gc_sections], + install : true, +) + +if with_tests + libvulkan_intel_test = static_library( + 'vulkan_intel_test', + [files('anv_gem_stubs.c'), block_entrypoints], + include_directories : [inc_common, inc_intel, inc_compiler, inc_drm_uapi, + inc_vulkan_util, inc_vulkan_wsi], + link_whole : libanv_common, + link_with : [libanv_gen_libs, libintel_compiler, libintel_common, + libisl, libblorp, libvulkan_util, libvulkan_wsi, + libnir, libmesa_util], + dependencies : [dep_libdrm, dep_thread, dep_dl, dep_m, anv_deps, + dep_valgrind], + c_args : [c_vis_args, no_override_init_args, '-msse2', anv_flags], + ) + + foreach t : ['block_pool_no_free', 'state_pool_no_free', + 'state_pool_free_list_only', 'state_pool'] + _exe = executable( + t, + ['tests/@[email protected]'.format(t), dummy_cpp, block_entrypoints], + link_with : libvulkan_intel_test, + dependencies : [dep_libdrm, dep_thread, dep_m, dep_valgrind], + include_directories : [inc_common, inc_intel, inc_compiler, + inc_vulkan_util, inc_vulkan_wsi], + ) + test('anv_@0@'.format(t), _exe) + endforeach +endif |