4 files changed, 121 insertions, 0 deletions

diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index f7f276f16df..f7b4c701841 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1203,6 +1203,29 @@ isl_surf_fill_state_s(const struct isl_device *dev, void *state,
    }
 }
 
+void
+isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
+                        const struct isl_buffer_fill_state_info *restrict info)
+{
+   switch (ISL_DEV_GEN(dev)) {
+   case 7:
+      if (ISL_DEV_IS_HASWELL(dev)) {
+         isl_gen75_buffer_fill_state_s(state, info);
+      } else {
+         isl_gen7_buffer_fill_state_s(state, info);
+      }
+      break;
+   case 8:
+      isl_gen8_buffer_fill_state_s(state, info);
+      break;
+   case 9:
+      isl_gen9_buffer_fill_state_s(state, info);
+      break;
+   default:
+      assert(!"Cannot fill surface state for this gen");
+   }
+}
+
 /**
  * A variant of isl_surf_get_image_offset_sa() specific to
  * ISL_DIM_LAYOUT_GEN4_2D.
diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h
index dbd480c51ce..151f1ca27cb 100644
--- a/src/intel/isl/isl.h
+++ b/src/intel/isl/isl.h
@@ -789,6 +789,35 @@ struct isl_surf_fill_state_info {
    union isl_color_value clear_color;
 };
 
+struct isl_buffer_fill_state_info {
+   /**
+    * The address of the surface in GPU memory.
+    */
+   uint64_t address;
+
+   /**
+    * The size of the buffer
+    */
+   uint64_t size;
+
+   /**
+    * The Memory Object Control state for the filled surface state.
+    *
+    * The exact format of this value depends on hardware generation.
+    */
+   uint32_t mocs;
+
+   /**
+    * The format to use in the surface state
+    *
+    * This may differ from the format of the actual isl_surf but have the
+    * same block size.
+    */
+   enum isl_format format;
+
+   uint32_t stride;
+};
+
 extern const struct isl_format_layout isl_format_layouts[];
 
 void
@@ -991,6 +1020,14 @@ void
 isl_surf_fill_state_s(const struct isl_device *dev, void *state,
                       const struct isl_surf_fill_state_info *restrict info);
 
+#define isl_buffer_fill_state(dev, state, ...) \
+   isl_buffer_fill_state_s((dev), (state), \
+                           &(struct isl_buffer_fill_state_info) {  __VA_ARGS__ });
+
+void
+isl_buffer_fill_state_s(const struct isl_device *dev, void *state,
+                        const struct isl_buffer_fill_state_info *restrict info);
+
 /**
  * Alignment of the upper-left sample of each subimage, in units of surface
  * elements.
diff --git a/src/intel/isl/isl_priv.h b/src/intel/isl/isl_priv.h
index d3f08094df9..7b222594fd4 100644
--- a/src/intel/isl/isl_priv.h
+++ b/src/intel/isl/isl_priv.h
@@ -152,3 +152,19 @@ isl_gen8_surf_fill_state_s(const struct isl_device *dev, void *state,
 void
 isl_gen9_surf_fill_state_s(const struct isl_device *dev, void *state,
                            const struct isl_surf_fill_state_info *restrict info);
+
+void
+isl_gen7_buffer_fill_state_s(void *state,
+                             const struct isl_buffer_fill_state_info *restrict info);
+
+void
+isl_gen75_buffer_fill_state_s(void *state,
+                              const struct isl_buffer_fill_state_info *restrict info);
+
+void
+isl_gen8_buffer_fill_state_s(void *state,
+                             const struct isl_buffer_fill_state_info *restrict info);
+
+void
+isl_gen9_buffer_fill_state_s(void *state,
+                             const struct isl_buffer_fill_state_info *restrict info);
diff --git a/src/intel/isl/isl_surface_state.c b/src/intel/isl/isl_surface_state.c
index fe3c083c574..12f4fb6bd98 100644
--- a/src/intel/isl/isl_surface_state.c
+++ b/src/intel/isl/isl_surface_state.c
@@ -392,3 +392,48 @@ isl_genX(surf_fill_state_s)(const struct isl_device *dev, void *state,
 
    GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &s);
 }
+
+void
+isl_genX(buffer_fill_state_s)(void *state,
+                              const struct isl_buffer_fill_state_info *restrict info)
+{
+   uint32_t num_elements = info->size / info->stride;
+
+   struct GENX(RENDER_SURFACE_STATE) surface_state = {
+      .SurfaceType = SURFTYPE_BUFFER,
+      .SurfaceArray = false,
+      .SurfaceFormat = info->format,
+      .SurfaceVerticalAlignment = isl_to_gen_valign[4],
+      .SurfaceHorizontalAlignment = isl_to_gen_halign[4],
+      .Height = ((num_elements - 1) >> 7) & 0x3fff,
+      .Width = (num_elements - 1) & 0x7f,
+      .Depth = ((num_elements - 1) >> 21) & 0x3f,
+      .SurfacePitch = info->stride - 1,
+      .NumberofMultisamples = MULTISAMPLECOUNT_1,
+
+#if (GEN_GEN >= 8)
+      .TileMode = LINEAR,
+#else
+      .TiledSurface = false,
+#endif
+
+#if (GEN_GEN >= 8)
+      .SamplerL2BypassModeDisable = true,
+      .RenderCacheReadWriteMode = WriteOnlyCache,
+#else
+      .RenderCacheReadWriteMode = 0,
+#endif
+
+      .MOCS = info->mocs,
+
+#if (GEN_GEN >= 8 || GEN_IS_HASWELL)
+      .ShaderChannelSelectRed = SCS_RED,
+      .ShaderChannelSelectGreen = SCS_GREEN,
+      .ShaderChannelSelectBlue = SCS_BLUE,
+      .ShaderChannelSelectAlpha = SCS_ALPHA,
+#endif
+      .SurfaceBaseAddress = info->address,
+   };
+
+   GENX(RENDER_SURFACE_STATE_pack)(NULL, state, &surface_state);
+}