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-rw-r--r--src/intel/compiler/brw_nir_lower_image_load_store.c2
-rw-r--r--src/intel/vulkan/anv_nir_apply_pipeline_layout.c3
2 files changed, 3 insertions, 2 deletions
diff --git a/src/intel/compiler/brw_nir_lower_image_load_store.c b/src/intel/compiler/brw_nir_lower_image_load_store.c
index 4494dccccd2..819fb440f2c 100644
--- a/src/intel/compiler/brw_nir_lower_image_load_store.c
+++ b/src/intel/compiler/brw_nir_lower_image_load_store.c
@@ -617,7 +617,7 @@ lower_image_store_instr(nir_builder *b,
/* For write-only surfaces, we trust that the hardware can just do the
* conversion for us.
*/
- if (var->data.image.write_only)
+ if (var->data.image.access & ACCESS_NON_READABLE)
return false;
const enum isl_format image_fmt =
diff --git a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
index 67ebaa6ce6c..84a664826e8 100644
--- a/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
+++ b/src/intel/vulkan/anv_nir_apply_pipeline_layout.c
@@ -463,7 +463,8 @@ anv_nir_apply_pipeline_layout(struct anv_pipeline *pipeline,
dim == GLSL_SAMPLER_DIM_SUBPASS_MS)
pipe_binding[i].input_attachment_index = var->data.index + i;
- pipe_binding[i].write_only = var->data.image.write_only;
+ pipe_binding[i].write_only =
+ (var->data.image.access & ACCESS_NON_READABLE) != 0;
}
}