diff options
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/compiler/brw_eu_defines.h | 1 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs.cpp | 12 | ||||
| -rw-r--r-- | src/intel/compiler/brw_shader.cpp | 2 |
3 files changed, 5 insertions, 10 deletions
diff --git a/src/intel/compiler/brw_eu_defines.h b/src/intel/compiler/brw_eu_defines.h index aefc43bc7d6..05649344f48 100644 --- a/src/intel/compiler/brw_eu_defines.h +++ b/src/intel/compiler/brw_eu_defines.h @@ -361,7 +361,6 @@ enum opcode { SHADER_OPCODE_SAMPLEINFO, SHADER_OPCODE_SAMPLEINFO_LOGICAL, - SHADER_OPCODE_IMAGE_SIZE, SHADER_OPCODE_IMAGE_SIZE_LOGICAL, /** diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 5d7d5ff9deb..02579747d41 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -230,7 +230,6 @@ fs_inst::is_send_from_grf() const case SHADER_OPCODE_TYPED_ATOMIC: case SHADER_OPCODE_TYPED_SURFACE_READ: case SHADER_OPCODE_TYPED_SURFACE_WRITE: - case SHADER_OPCODE_IMAGE_SIZE: case SHADER_OPCODE_URB_WRITE_SIMD8: case SHADER_OPCODE_URB_WRITE_SIMD8_PER_SLOT: case SHADER_OPCODE_URB_WRITE_SIMD8_MASKED: @@ -266,7 +265,6 @@ fs_inst::is_control_source(unsigned arg) const case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: case FS_OPCODE_INTERPOLATE_AT_PER_SLOT_OFFSET: - case SHADER_OPCODE_IMAGE_SIZE: case SHADER_OPCODE_GET_BUFFER_SIZE: return arg == 1; @@ -974,7 +972,6 @@ fs_inst::size_read(int arg) const case SHADER_OPCODE_TYPED_ATOMIC: case SHADER_OPCODE_TYPED_SURFACE_READ: case SHADER_OPCODE_TYPED_SURFACE_WRITE: - case SHADER_OPCODE_IMAGE_SIZE: case FS_OPCODE_INTERPOLATE_AT_SAMPLE: case FS_OPCODE_INTERPOLATE_AT_SHARED_OFFSET: case SHADER_OPCODE_BYTE_SCATTERED_WRITE: @@ -4670,7 +4667,7 @@ sampler_msg_type(const gen_device_info *devinfo, return shadow_compare ? GEN9_SAMPLER_MESSAGE_SAMPLE_C_LZ : GEN9_SAMPLER_MESSAGE_SAMPLE_LZ; case SHADER_OPCODE_TXS: - case SHADER_OPCODE_IMAGE_SIZE: + case SHADER_OPCODE_IMAGE_SIZE_LOGICAL: return GEN5_SAMPLER_MESSAGE_SAMPLE_RESINFO; case SHADER_OPCODE_TXD: assert(!shadow_compare || devinfo->gen >= 8 || devinfo->is_haswell); @@ -4837,7 +4834,7 @@ lower_sampler_logical_send_gen7(const fs_builder &bld, fs_inst *inst, opcode op, bld.MOV(retype(sources[length], BRW_REGISTER_TYPE_UD), lod); length++; break; - case SHADER_OPCODE_IMAGE_SIZE: + case SHADER_OPCODE_IMAGE_SIZE_LOGICAL: /* We need an LOD; just use 0 */ bld.MOV(retype(sources[length], BRW_REGISTER_TYPE_UD), brw_imm_ud(0)); length++; @@ -4969,7 +4966,7 @@ lower_sampler_logical_send_gen7(const fs_builder &bld, fs_inst *inst, opcode op, case SHADER_OPCODE_TG4_OFFSET: base_binding_table_index = prog_data->binding_table.gather_texture_start; break; - case SHADER_OPCODE_IMAGE_SIZE: + case SHADER_OPCODE_IMAGE_SIZE_LOGICAL: base_binding_table_index = prog_data->binding_table.image_start; break; default: @@ -5538,7 +5535,8 @@ fs_visitor::lower_logical_sends() break; case SHADER_OPCODE_IMAGE_SIZE_LOGICAL: - lower_sampler_logical_send(ibld, inst, SHADER_OPCODE_IMAGE_SIZE); + lower_sampler_logical_send(ibld, inst, + SHADER_OPCODE_IMAGE_SIZE_LOGICAL); break; case FS_OPCODE_TXB_LOGICAL: diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp index 569e68e02af..7b1a835e65b 100644 --- a/src/intel/compiler/brw_shader.cpp +++ b/src/intel/compiler/brw_shader.cpp @@ -270,8 +270,6 @@ brw_instruction_name(const struct gen_device_info *devinfo, enum opcode op) case SHADER_OPCODE_SAMPLEINFO_LOGICAL: return "sampleinfo_logical"; - case SHADER_OPCODE_IMAGE_SIZE: - return "image_size"; case SHADER_OPCODE_IMAGE_SIZE_LOGICAL: return "image_size_logical"; |