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-rw-r--r--src/intel/vulkan/anv_meta_blit.c1
-rw-r--r--src/intel/vulkan/anv_meta_blit2d.c1
-rw-r--r--src/intel/vulkan/anv_meta_clear.c1
-rw-r--r--src/intel/vulkan/anv_meta_resolve.c1
-rw-r--r--src/intel/vulkan/anv_private.h1
-rw-r--r--src/intel/vulkan/gen7_pipeline.c2
-rw-r--r--src/intel/vulkan/gen8_pipeline.c2
7 files changed, 2 insertions, 7 deletions
diff --git a/src/intel/vulkan/anv_meta_blit.c b/src/intel/vulkan/anv_meta_blit.c
index 6c3668bdbf7..3c54ef4bafb 100644
--- a/src/intel/vulkan/anv_meta_blit.c
+++ b/src/intel/vulkan/anv_meta_blit.c
@@ -669,7 +669,6 @@ anv_device_init_meta_blit_state(struct anv_device *device)
const struct anv_graphics_pipeline_create_info anv_pipeline_info = {
.color_attachment_count = -1,
.use_repclear = false,
- .disable_scissor = true,
.disable_vs = true,
.use_rectlist = true
};
diff --git a/src/intel/vulkan/anv_meta_blit2d.c b/src/intel/vulkan/anv_meta_blit2d.c
index 5c1e30c12ac..577eeaea104 100644
--- a/src/intel/vulkan/anv_meta_blit2d.c
+++ b/src/intel/vulkan/anv_meta_blit2d.c
@@ -1190,7 +1190,6 @@ blit2d_init_pipeline(struct anv_device *device,
const struct anv_graphics_pipeline_create_info anv_pipeline_info = {
.color_attachment_count = -1,
.use_repclear = false,
- .disable_scissor = true,
.disable_vs = true,
.use_rectlist = true
};
diff --git a/src/intel/vulkan/anv_meta_clear.c b/src/intel/vulkan/anv_meta_clear.c
index 6dd3e0be759..c5c7d563e91 100644
--- a/src/intel/vulkan/anv_meta_clear.c
+++ b/src/intel/vulkan/anv_meta_clear.c
@@ -211,7 +211,6 @@ create_pipeline(struct anv_device *device,
&(struct anv_graphics_pipeline_create_info) {
.color_attachment_count = MAX_RTS,
.use_repclear = use_repclear,
- .disable_scissor = true,
.disable_vs = true,
.use_rectlist = true
},
diff --git a/src/intel/vulkan/anv_meta_resolve.c b/src/intel/vulkan/anv_meta_resolve.c
index 9efe6f7d986..f83bb6bbfd3 100644
--- a/src/intel/vulkan/anv_meta_resolve.c
+++ b/src/intel/vulkan/anv_meta_resolve.c
@@ -343,7 +343,6 @@ create_pipeline(struct anv_device *device,
&(struct anv_graphics_pipeline_create_info) {
.color_attachment_count = -1,
.use_repclear = false,
- .disable_scissor = true,
.disable_vs = true,
.use_rectlist = true
},
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index d62e5baeaa9..ae2e08d2dfb 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1488,7 +1488,6 @@ struct anv_graphics_pipeline_create_info {
int8_t color_attachment_count;
bool use_repclear;
- bool disable_scissor;
bool disable_vs;
bool use_rectlist;
};
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 5c04fb749cc..d6d5ce6778f 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -54,7 +54,7 @@ gen7_emit_rs_state(struct anv_pipeline *pipeline,
.CullMode = vk_to_gen_cullmode[info->cullMode],
/* uint32_t LineEndCapAntialiasingRegionWidth; */
- .ScissorRectangleEnable = !(extra && extra->disable_scissor),
+ .ScissorRectangleEnable = !(extra && extra->use_rectlist),
/* uint32_t MultisampleRasterizationMode; */
/* bool LastPixelEnable; */
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 7f26ef5e197..6f6868ea5ea 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -82,7 +82,7 @@ emit_rs_state(struct anv_pipeline *pipeline,
.CullMode = vk_to_gen_cullmode[info->cullMode],
.FrontFaceFillMode = vk_to_gen_fillmode[info->polygonMode],
.BackFaceFillMode = vk_to_gen_fillmode[info->polygonMode],
- .ScissorRectangleEnable = !(extra && extra->disable_scissor),
+ .ScissorRectangleEnable = !(extra && extra->use_rectlist),
#if GEN_GEN == 8
.ViewportZClipTestEnable = true,
#else