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-rw-r--r--src/intel/isl/isl.c2
-rw-r--r--src/intel/vulkan/anv_batch_chain.c2
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c4
-rw-r--r--src/intel/vulkan/genX_pipeline.c2
4 files changed, 5 insertions, 5 deletions
diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
index 6e027277993..1b033cb6aac 100644
--- a/src/intel/isl/isl.c
+++ b/src/intel/isl/isl.c
@@ -1193,7 +1193,7 @@ isl_calc_phys_total_extent_el_gen9_1d(
uint32_t *array_pitch_el_rows,
struct isl_extent2d *phys_total_el)
{
- MAYBE_UNUSED const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
+ const struct isl_format_layout *fmtl = isl_format_get_layout(info->format);
assert(phys_level0_sa->height == 1);
assert(phys_level0_sa->depth == 1);
diff --git a/src/intel/vulkan/anv_batch_chain.c b/src/intel/vulkan/anv_batch_chain.c
index 114eda0336f..14321abd254 100644
--- a/src/intel/vulkan/anv_batch_chain.c
+++ b/src/intel/vulkan/anv_batch_chain.c
@@ -418,7 +418,7 @@ anv_batch_bo_link(struct anv_cmd_buffer *cmd_buffer,
struct anv_batch_bo *next_bbo,
uint32_t next_bbo_offset)
{
- MAYBE_UNUSED const uint32_t bb_start_offset =
+ const uint32_t bb_start_offset =
prev_bbo->length - GEN8_MI_BATCH_BUFFER_START_length * 4;
MAYBE_UNUSED const uint32_t *bb_start = prev_bbo->bo.map + bb_start_offset;
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index 2045d1647cb..5b76ac61679 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -1731,7 +1731,7 @@ genX(cmd_buffer_config_l3)(struct anv_cmd_buffer *cmd_buffer,
assert(!urb_low_bw || cfg->n[GEN_L3P_URB] == cfg->n[GEN_L3P_SLM]);
/* Minimum number of ways that can be allocated to the URB. */
- MAYBE_UNUSED const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0;
+ const unsigned n0_urb = devinfo->is_baytrail ? 32 : 0;
assert(cfg->n[GEN_L3P_URB] >= n0_urb);
uint32_t l3sqcr1, l3cr2, l3cr3;
@@ -3540,7 +3540,7 @@ void
genX(cmd_buffer_flush_compute_state)(struct anv_cmd_buffer *cmd_buffer)
{
struct anv_pipeline *pipeline = cmd_buffer->state.compute.base.pipeline;
- MAYBE_UNUSED VkResult result;
+ VkResult result;
assert(pipeline->active_stages == VK_SHADER_STAGE_COMPUTE_BIT);
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 9796ad29df0..ebfcbb28a95 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -955,7 +955,7 @@ emit_ds_state(struct anv_pipeline *pipeline,
#endif
}
-MAYBE_UNUSED static bool
+static bool
is_dual_src_blend_factor(VkBlendFactor factor)
{
return factor == VK_BLEND_FACTOR_SRC1_COLOR ||