5 files changed, 8 insertions, 8 deletions
diff --git a/src/intel/genxml/gen6.xml b/src/intel/genxml/gen6.xml
index afaea7f1db3..7525fce6b19 100644
--- a/src/intel/genxml/gen6.xml
+++ b/src/intel/genxml/gen6.xml
@@ -176,7 +176,7 @@
 
   <struct name="COLOR_CALC_STATE" length="6">
     <field name="Stencil Reference Value" start="24" end="31" type="uint"/>
-    <field name="BackFace Stencil Reference Value" start="16" end="23" type="uint"/>
+    <field name="Backface Stencil Reference Value" start="16" end="23" type="uint"/>
     <field name="Round Disable Function Disable" start="15" end="15" type="bool"/>
     <field name="Alpha Test Format" start="0" end="0" type="uint">
       <value name="ALPHATEST_UNORM8" value="0"/>
@@ -216,7 +216,7 @@
     <field name="Stencil Pass Depth Pass Op" start="19" end="21" type="uint"/>
     <field name="Stencil Buffer Write Enable" start="18" end="18" type="bool"/>
     <field name="Double Sided Stencil Enable" start="15" end="15" type="bool"/>
-    <field name="BackFace Stencil Test Function" start="12" end="14" type="uint">
+    <field name="Backface Stencil Test Function" start="12" end="14" type="uint">
       <value name="COMPAREFUNCTION_ALWAYS" value="0"/>
       <value name="COMPAREFUNCTION_NEVER" value="1"/>
       <value name="COMPAREFUNCTION_LESS" value="2"/>
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 7417f55e017..6f3e8ccc131 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -199,7 +199,7 @@
 
   <struct name="COLOR_CALC_STATE" length="6">
     <field name="Stencil Reference Value" start="24" end="31" type="uint"/>
-    <field name="BackFace Stencil Reference Value" start="16" end="23" type="uint"/>
+    <field name="Backface Stencil Reference Value" start="16" end="23" type="uint"/>
     <field name="Round Disable Function Disable" start="15" end="15" type="bool"/>
     <field name="Alpha Test Format" start="0" end="0" type="uint">
       <value name="ALPHATEST_UNORM8" value="0"/>
@@ -239,7 +239,7 @@
     <field name="Stencil Pass Depth Pass Op" start="19" end="21" type="uint"/>
     <field name="Stencil Buffer Write Enable" start="18" end="18" type="bool"/>
     <field name="Double Sided Stencil Enable" start="15" end="15" type="bool"/>
-    <field name="BackFace Stencil Test Function" start="12" end="14" type="uint">
+    <field name="Backface Stencil Test Function" start="12" end="14" type="uint">
       <value name="COMPAREFUNCTION_ALWAYS" value="0"/>
       <value name="COMPAREFUNCTION_NEVER" value="1"/>
       <value name="COMPAREFUNCTION_LESS" value="2"/>
diff --git a/src/intel/genxml/gen75.xml b/src/intel/genxml/gen75.xml
index 709904f16f3..ac1b6e416ac 100644
--- a/src/intel/genxml/gen75.xml
+++ b/src/intel/genxml/gen75.xml
@@ -209,7 +209,7 @@
 
   <struct name="COLOR_CALC_STATE" length="6">
     <field name="Stencil Reference Value" start="24" end="31" type="uint"/>
-    <field name="BackFace Stencil Reference Value" start="16" end="23" type="uint"/>
+    <field name="Backface Stencil Reference Value" start="16" end="23" type="uint"/>
     <field name="Round Disable Function Disable" start="15" end="15" type="bool"/>
     <field name="Alpha Test Format" start="0" end="0" type="uint">
       <value name="ALPHATEST_UNORM8" value="0"/>
@@ -249,7 +249,7 @@
     <field name="Stencil Pass Depth Pass Op" start="19" end="21" type="uint"/>
     <field name="Stencil Buffer Write Enable" start="18" end="18" type="bool"/>
     <field name="Double Sided Stencil Enable" start="15" end="15" type="bool"/>
-    <field name="BackFace Stencil Test Function" start="12" end="14" type="uint">
+    <field name="Backface Stencil Test Function" start="12" end="14" type="uint">
       <value name="COMPAREFUNCTION_ALWAYS" value="0"/>
       <value name="COMPAREFUNCTION_NEVER" value="1"/>
       <value name="COMPAREFUNCTION_LESS" value="2"/>
diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c
index 478122b9c0f..ffd1571c507 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -354,7 +354,7 @@ genX(cmd_buffer_flush_dynamic_state)(struct anv_cmd_buffer *cmd_buffer)
          .BlendConstantColorBlue = cmd_buffer->state.dynamic.blend_constants[2],
          .BlendConstantColorAlpha = cmd_buffer->state.dynamic.blend_constants[3],
          .StencilReferenceValue = d->stencil_reference.front & 0xff,
-         .BackFaceStencilReferenceValue = d->stencil_reference.back & 0xff,
+         .BackfaceStencilReferenceValue = d->stencil_reference.back & 0xff,
       };
       GENX(COLOR_CALC_STATE_pack)(NULL, cc_state.map, &cc);
       if (!cmd_buffer->device->info.has_llc)
diff --git a/src/intel/vulkan/gen7_pipeline.c b/src/intel/vulkan/gen7_pipeline.c
index 285b191352c..4097abd23fa 100644
--- a/src/intel/vulkan/gen7_pipeline.c
+++ b/src/intel/vulkan/gen7_pipeline.c
@@ -104,7 +104,7 @@ gen7_emit_ds_state(struct anv_pipeline *pipeline,
       .BackfaceStencilFailOp = vk_to_gen_stencil_op[info->back.failOp],
       .BackfaceStencilPassDepthPassOp = vk_to_gen_stencil_op[info->back.passOp],
       .BackfaceStencilPassDepthFailOp = vk_to_gen_stencil_op[info->back.depthFailOp],
-      .BackFaceStencilTestFunction = vk_to_gen_compare_op[info->back.compareOp],
+      .BackfaceStencilTestFunction = vk_to_gen_compare_op[info->back.compareOp],
    };
 
    GENX(DEPTH_STENCIL_STATE_pack)(NULL, &pipeline->gen7.depth_stencil_state, &state);