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-rw-r--r--src/intel/vulkan/anv_cmd_buffer.c7
-rw-r--r--src/intel/vulkan/anv_private.h1
-rw-r--r--src/intel/vulkan/gen7_cmd_buffer.c2
-rw-r--r--src/intel/vulkan/gen8_cmd_buffer.c2
-rw-r--r--src/intel/vulkan/genX_cmd_buffer.c4
-rw-r--r--src/intel/vulkan/genX_pipeline.c4
6 files changed, 8 insertions, 12 deletions
diff --git a/src/intel/vulkan/anv_cmd_buffer.c b/src/intel/vulkan/anv_cmd_buffer.c
index 4d0fd7c67ff..63d096c6e8b 100644
--- a/src/intel/vulkan/anv_cmd_buffer.c
+++ b/src/intel/vulkan/anv_cmd_buffer.c
@@ -1076,9 +1076,8 @@ anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
if (reg_aligned_constant_size == 0)
return (struct anv_state) { .offset = 0 };
- const unsigned threads = pipeline->cs_thread_width_max;
const unsigned total_push_constants_size =
- reg_aligned_constant_size * threads;
+ reg_aligned_constant_size * cs_prog_data->threads;
const unsigned push_constant_alignment =
cmd_buffer->device->info.gen < 8 ? 32 : 64;
const unsigned aligned_total_push_constants_size =
@@ -1091,7 +1090,7 @@ anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
/* Walk through the param array and fill the buffer with data */
uint32_t *u32_map = state.map;
- brw_cs_fill_local_id_payload(cs_prog_data, u32_map, threads,
+ brw_cs_fill_local_id_payload(cs_prog_data, u32_map, cs_prog_data->threads,
reg_aligned_constant_size);
/* Setup uniform data for the first thread */
@@ -1102,7 +1101,7 @@ anv_cmd_buffer_cs_push_constants(struct anv_cmd_buffer *cmd_buffer)
/* Copy uniform data from the first thread to every other thread */
const size_t uniform_data_size = prog_data->nr_params * sizeof(uint32_t);
- for (unsigned t = 1; t < threads; t++) {
+ for (unsigned t = 1; t < cs_prog_data->threads; t++) {
memcpy(&u32_map[t * param_aligned_count + local_id_dwords],
&u32_map[local_id_dwords],
uniform_data_size);
diff --git a/src/intel/vulkan/anv_private.h b/src/intel/vulkan/anv_private.h
index 7325f3f5e61..26ffbd65666 100644
--- a/src/intel/vulkan/anv_private.h
+++ b/src/intel/vulkan/anv_private.h
@@ -1474,7 +1474,6 @@ struct anv_pipeline {
bool primitive_restart;
uint32_t topology;
- uint32_t cs_thread_width_max;
uint32_t cs_right_mask;
struct {
diff --git a/src/intel/vulkan/gen7_cmd_buffer.c b/src/intel/vulkan/gen7_cmd_buffer.c
index 331275e5a88..40ab0089908 100644
--- a/src/intel/vulkan/gen7_cmd_buffer.c
+++ b/src/intel/vulkan/gen7_cmd_buffer.c
@@ -271,7 +271,7 @@ flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer)
.BarrierEnable = cs_prog_data->uses_barrier,
.SharedLocalMemorySize = slm_size,
.NumberofThreadsinGPGPUThreadGroup =
- pipeline->cs_thread_width_max);
+ cs_prog_data->threads);
const uint32_t size = GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t);
anv_batch_emit(&cmd_buffer->batch,
diff --git a/src/intel/vulkan/gen8_cmd_buffer.c b/src/intel/vulkan/gen8_cmd_buffer.c
index 547fedd1eab..e139e8af961 100644
--- a/src/intel/vulkan/gen8_cmd_buffer.c
+++ b/src/intel/vulkan/gen8_cmd_buffer.c
@@ -356,7 +356,7 @@ flush_compute_descriptor_set(struct anv_cmd_buffer *cmd_buffer)
.BarrierEnable = cs_prog_data->uses_barrier,
.SharedLocalMemorySize = slm_size,
.NumberofThreadsinGPGPUThreadGroup =
- pipeline->cs_thread_width_max);
+ cs_prog_data->threads);
uint32_t size = GENX(INTERFACE_DESCRIPTOR_DATA_length) * sizeof(uint32_t);
anv_batch_emit(&cmd_buffer->batch,
diff --git a/src/intel/vulkan/genX_cmd_buffer.c b/src/intel/vulkan/genX_cmd_buffer.c
index e7d322c3f30..d9acf58517c 100644
--- a/src/intel/vulkan/genX_cmd_buffer.c
+++ b/src/intel/vulkan/genX_cmd_buffer.c
@@ -773,7 +773,7 @@ void genX(CmdDispatch)(
ggw.SIMDSize = prog_data->simd_size / 16;
ggw.ThreadDepthCounterMaximum = 0;
ggw.ThreadHeightCounterMaximum = 0;
- ggw.ThreadWidthCounterMaximum = pipeline->cs_thread_width_max - 1;
+ ggw.ThreadWidthCounterMaximum = prog_data->threads - 1;
ggw.ThreadGroupIDXDimension = x;
ggw.ThreadGroupIDYDimension = y;
ggw.ThreadGroupIDZDimension = z;
@@ -874,7 +874,7 @@ void genX(CmdDispatchIndirect)(
ggw.SIMDSize = prog_data->simd_size / 16;
ggw.ThreadDepthCounterMaximum = 0;
ggw.ThreadHeightCounterMaximum = 0;
- ggw.ThreadWidthCounterMaximum = pipeline->cs_thread_width_max - 1;
+ ggw.ThreadWidthCounterMaximum = prog_data->threads - 1;
ggw.RightExecutionMask = pipeline->cs_right_mask;
ggw.BottomExecutionMask = 0xffffffff;
}
diff --git a/src/intel/vulkan/genX_pipeline.c b/src/intel/vulkan/genX_pipeline.c
index 918a9a4f03b..1776577d0a2 100644
--- a/src/intel/vulkan/genX_pipeline.c
+++ b/src/intel/vulkan/genX_pipeline.c
@@ -97,8 +97,6 @@ genX(compute_pipeline_create)(
uint32_t group_size = cs_prog_data->local_size[0] *
cs_prog_data->local_size[1] * cs_prog_data->local_size[2];
- pipeline->cs_thread_width_max =
- DIV_ROUND_UP(group_size, cs_prog_data->simd_size);
uint32_t remainder = group_size & (cs_prog_data->simd_size - 1);
if (remainder > 0)
@@ -107,7 +105,7 @@ genX(compute_pipeline_create)(
pipeline->cs_right_mask = ~0u >> (32 - cs_prog_data->simd_size);
const uint32_t vfe_curbe_allocation =
- push_constant_regs * pipeline->cs_thread_width_max;
+ push_constant_regs * cs_prog_data->threads;
anv_batch_emit(&pipeline->batch, GENX(MEDIA_VFE_STATE), vfe) {
vfe.ScratchSpaceBasePointer = pipeline->scratch_start[MESA_SHADER_COMPUTE];