diff options
Diffstat (limited to 'src/intel')
| -rw-r--r-- | src/intel/compiler/brw_compiler.c | 3 | ||||
| -rw-r--r-- | src/intel/compiler/brw_compiler.h | 1 | ||||
| -rw-r--r-- | src/intel/compiler/brw_fs_nir.cpp | 8 | ||||
| -rw-r--r-- | src/intel/compiler/brw_nir.c | 5 | ||||
| -rw-r--r-- | src/intel/compiler/brw_vec4.cpp | 7 |
5 files changed, 8 insertions, 16 deletions
diff --git a/src/intel/compiler/brw_compiler.c b/src/intel/compiler/brw_compiler.c index d5f483798a9..6480dbefbf6 100644 --- a/src/intel/compiler/brw_compiler.c +++ b/src/intel/compiler/brw_compiler.c @@ -45,7 +45,8 @@ .lower_device_index_to_zero = true, \ .native_integers = true, \ .use_interpolated_input_intrinsics = true, \ - .vertex_id_zero_based = true + .vertex_id_zero_based = true, \ + .lower_base_vertex = true #define COMMON_SCALAR_OPTIONS \ .lower_pack_half_2x16 = true, \ diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h index e3bf535a519..8b4e6fe2e29 100644 --- a/src/intel/compiler/brw_compiler.h +++ b/src/intel/compiler/brw_compiler.h @@ -977,7 +977,6 @@ struct brw_vs_prog_data { bool uses_vertexid; bool uses_instanceid; - bool uses_basevertex; bool uses_is_indexed_draw; bool uses_firstvertex; bool uses_baseinstance; diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp index 22beb0e00d1..02aaf144019 100644 --- a/src/intel/compiler/brw_fs_nir.cpp +++ b/src/intel/compiler/brw_fs_nir.cpp @@ -112,10 +112,10 @@ emit_system_values_block(nir_block *block, fs_visitor *v) nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); switch (intrin->intrinsic) { case nir_intrinsic_load_vertex_id: - unreachable("should be lowered by lower_vertex_id()."); + case nir_intrinsic_load_base_vertex: + unreachable("should be lowered by nir_lower_system_values()."); case nir_intrinsic_load_vertex_id_zero_base: - case nir_intrinsic_load_base_vertex: case nir_intrinsic_load_is_indexed_draw: case nir_intrinsic_load_first_vertex: case nir_intrinsic_load_instance_id: @@ -2420,10 +2420,10 @@ fs_visitor::nir_emit_vs_intrinsic(const fs_builder &bld, switch (instr->intrinsic) { case nir_intrinsic_load_vertex_id: - unreachable("should be lowered by lower_vertex_id()"); + case nir_intrinsic_load_base_vertex: + unreachable("should be lowered by nir_lower_system_values()"); case nir_intrinsic_load_vertex_id_zero_base: - case nir_intrinsic_load_base_vertex: case nir_intrinsic_load_instance_id: case nir_intrinsic_load_base_instance: case nir_intrinsic_load_draw_id: { diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index a624deb6d2a..9998c59586e 100644 --- a/src/intel/compiler/brw_nir.c +++ b/src/intel/compiler/brw_nir.c @@ -238,8 +238,7 @@ brw_nir_lower_vs_inputs(nir_shader *nir, */ const bool has_sgvs = nir->info.system_values_read & - (BITFIELD64_BIT(SYSTEM_VALUE_BASE_VERTEX) | - BITFIELD64_BIT(SYSTEM_VALUE_FIRST_VERTEX) | + (BITFIELD64_BIT(SYSTEM_VALUE_FIRST_VERTEX) | BITFIELD64_BIT(SYSTEM_VALUE_BASE_INSTANCE) | BITFIELD64_BIT(SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) | BITFIELD64_BIT(SYSTEM_VALUE_INSTANCE_ID)); @@ -261,7 +260,6 @@ brw_nir_lower_vs_inputs(nir_shader *nir, nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr); switch (intrin->intrinsic) { - case nir_intrinsic_load_base_vertex: case nir_intrinsic_load_first_vertex: case nir_intrinsic_load_base_instance: case nir_intrinsic_load_vertex_id_zero_base: @@ -280,7 +278,6 @@ brw_nir_lower_vs_inputs(nir_shader *nir, nir_intrinsic_set_base(load, num_inputs); switch (intrin->intrinsic) { - case nir_intrinsic_load_base_vertex: case nir_intrinsic_load_first_vertex: nir_intrinsic_set_component(load, 0); break; diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp index 898df90225f..4464a913988 100644 --- a/src/intel/compiler/brw_vec4.cpp +++ b/src/intel/compiler/brw_vec4.cpp @@ -2825,8 +2825,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data, * incoming vertex attribute. So, add an extra slot. */ if (shader->info.system_values_read & - (BITFIELD64_BIT(SYSTEM_VALUE_BASE_VERTEX) | - BITFIELD64_BIT(SYSTEM_VALUE_FIRST_VERTEX) | + (BITFIELD64_BIT(SYSTEM_VALUE_FIRST_VERTEX) | BITFIELD64_BIT(SYSTEM_VALUE_BASE_INSTANCE) | BITFIELD64_BIT(SYSTEM_VALUE_VERTEX_ID_ZERO_BASE) | BITFIELD64_BIT(SYSTEM_VALUE_INSTANCE_ID))) { @@ -2841,10 +2840,6 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data, } if (shader->info.system_values_read & - BITFIELD64_BIT(SYSTEM_VALUE_BASE_VERTEX)) - prog_data->uses_basevertex = true; - - if (shader->info.system_values_read & BITFIELD64_BIT(SYSTEM_VALUE_IS_INDEXED_DRAW)) prog_data->uses_is_indexed_draw = true; |