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-rw-r--r--src/intel/blorp/blorp.c4
-rw-r--r--src/intel/compiler/brw_compiler.h15
-rw-r--r--src/intel/compiler/brw_fs.cpp13
-rw-r--r--src/intel/compiler/brw_fs.h3
-rw-r--r--src/intel/compiler/brw_fs_generator.cpp11
-rw-r--r--src/intel/compiler/brw_shader.cpp5
-rw-r--r--src/intel/compiler/brw_vec4.cpp6
-rw-r--r--src/intel/compiler/brw_vec4.h3
-rw-r--r--src/intel/compiler/brw_vec4_generator.cpp17
-rw-r--r--src/intel/compiler/brw_vec4_gs_visitor.cpp8
-rw-r--r--src/intel/compiler/brw_vec4_tcs.cpp5
-rw-r--r--src/intel/vulkan/anv_pipeline.c13
12 files changed, 75 insertions, 28 deletions
diff --git a/src/intel/blorp/blorp.c b/src/intel/blorp/blorp.c
index 1144e770b49..480107d2a34 100644
--- a/src/intel/blorp/blorp.c
+++ b/src/intel/blorp/blorp.c
@@ -206,7 +206,7 @@ blorp_compile_fs(struct blorp_context *blorp, void *mem_ctx,
const unsigned *program =
brw_compile_fs(compiler, blorp->driver_ctx, mem_ctx, wm_key,
wm_prog_data, nir, NULL, -1, -1, -1, false, use_repclear,
- NULL, NULL);
+ NULL, NULL, NULL);
return program;
}
@@ -235,7 +235,7 @@ blorp_compile_vs(struct blorp_context *blorp, void *mem_ctx,
const unsigned *program =
brw_compile_vs(compiler, blorp->driver_ctx, mem_ctx,
- &vs_key, vs_prog_data, nir, -1, NULL);
+ &vs_key, vs_prog_data, nir, -1, NULL, NULL);
return program;
}
diff --git a/src/intel/compiler/brw_compiler.h b/src/intel/compiler/brw_compiler.h
index 614410e3fb7..b1d7fefa7d3 100644
--- a/src/intel/compiler/brw_compiler.h
+++ b/src/intel/compiler/brw_compiler.h
@@ -1240,6 +1240,15 @@ DEFINE_PROG_DATA_DOWNCAST(clip)
DEFINE_PROG_DATA_DOWNCAST(sf)
#undef DEFINE_PROG_DATA_DOWNCAST
+struct brw_compile_stats {
+ uint32_t dispatch_width; /**< 0 for vec4 */
+ uint32_t instructions;
+ uint32_t loops;
+ uint32_t cycles;
+ uint32_t spills;
+ uint32_t fills;
+};
+
/** @} */
struct brw_compiler *
@@ -1278,6 +1287,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
struct brw_vs_prog_data *prog_data,
struct nir_shader *shader,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
/**
@@ -1293,6 +1303,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
struct brw_tcs_prog_data *prog_data,
struct nir_shader *nir,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
/**
@@ -1309,6 +1320,7 @@ brw_compile_tes(const struct brw_compiler *compiler, void *log_data,
struct nir_shader *shader,
struct gl_program *prog,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
/**
@@ -1324,6 +1336,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
struct nir_shader *shader,
struct gl_program *prog,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
/**
@@ -1375,6 +1388,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
int shader_time_index32,
bool allow_spilling,
bool use_rep_send, struct brw_vue_map *vue_map,
+ struct brw_compile_stats *stats, /**< Array of three stats */
char **error_str);
/**
@@ -1389,6 +1403,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
struct brw_cs_prog_data *prog_data,
const struct nir_shader *shader,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str);
void brw_debug_key_recompile(const struct brw_compiler *c, void *log,
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp
index a4ebae336f5..80748833abc 100644
--- a/src/intel/compiler/brw_fs.cpp
+++ b/src/intel/compiler/brw_fs.cpp
@@ -8033,6 +8033,7 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
int shader_time_index8, int shader_time_index16,
int shader_time_index32, bool allow_spilling,
bool use_rep_send, struct brw_vue_map *vue_map,
+ struct brw_compile_stats *stats,
char **error_str)
{
const struct gen_device_info *devinfo = compiler->devinfo;
@@ -8196,17 +8197,20 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
if (simd8_cfg) {
prog_data->dispatch_8 = true;
- g.generate_code(simd8_cfg, 8);
+ g.generate_code(simd8_cfg, 8, stats);
+ stats = stats ? stats + 1 : NULL;
}
if (simd16_cfg) {
prog_data->dispatch_16 = true;
- prog_data->prog_offset_16 = g.generate_code(simd16_cfg, 16);
+ prog_data->prog_offset_16 = g.generate_code(simd16_cfg, 16, stats);
+ stats = stats ? stats + 1 : NULL;
}
if (simd32_cfg) {
prog_data->dispatch_32 = true;
- prog_data->prog_offset_32 = g.generate_code(simd32_cfg, 32);
+ prog_data->prog_offset_32 = g.generate_code(simd32_cfg, 32, stats);
+ stats = stats ? stats + 1 : NULL;
}
return g.get_assembly();
@@ -8317,6 +8321,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
struct brw_cs_prog_data *prog_data,
const nir_shader *src_shader,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str)
{
prog_data->base.total_shared = src_shader->info.cs.shared_size;
@@ -8457,7 +8462,7 @@ brw_compile_cs(const struct brw_compiler *compiler, void *log_data,
g.enable_debug(name);
}
- g.generate_code(v->cfg, prog_data->simd_size);
+ g.generate_code(v->cfg, prog_data->simd_size, stats);
ret = g.get_assembly();
}
diff --git a/src/intel/compiler/brw_fs.h b/src/intel/compiler/brw_fs.h
index a3604aef509..14c736a4c81 100644
--- a/src/intel/compiler/brw_fs.h
+++ b/src/intel/compiler/brw_fs.h
@@ -428,7 +428,8 @@ public:
~fs_generator();
void enable_debug(const char *shader_name);
- int generate_code(const cfg_t *cfg, int dispatch_width);
+ int generate_code(const cfg_t *cfg, int dispatch_width,
+ struct brw_compile_stats *stats);
const unsigned *get_assembly();
private:
diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
index cd83a1fac70..df215a6174b 100644
--- a/src/intel/compiler/brw_fs_generator.cpp
+++ b/src/intel/compiler/brw_fs_generator.cpp
@@ -1664,7 +1664,8 @@ fs_generator::enable_debug(const char *shader_name)
}
int
-fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
+fs_generator::generate_code(const cfg_t *cfg, int dispatch_width,
+ struct brw_compile_stats *stats)
{
/* align to 64 byte boundary. */
while (p->next_insn_offset % 64)
@@ -2336,6 +2337,14 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
shader_stats.scheduler_mode,
shader_stats.promoted_constants,
before_size, after_size);
+ if (stats) {
+ stats->dispatch_width = dispatch_width;
+ stats->instructions = before_size / 16;
+ stats->loops = loop_count;
+ stats->cycles = cfg->cycle_count;
+ stats->spills = spill_count;
+ stats->fills = fill_count;
+ }
return start_offset;
}
diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_shader.cpp
index 630a51aaf3f..ba801c94eb2 100644
--- a/src/intel/compiler/brw_shader.cpp
+++ b/src/intel/compiler/brw_shader.cpp
@@ -1235,6 +1235,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
nir_shader *nir,
struct gl_program *prog,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str)
{
const struct gen_device_info *devinfo = compiler->devinfo;
@@ -1345,7 +1346,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
nir->info.name));
}
- g.generate_code(v.cfg, 8);
+ g.generate_code(v.cfg, 8, stats);
assembly = g.get_assembly();
} else {
@@ -1361,7 +1362,7 @@ brw_compile_tes(const struct brw_compiler *compiler,
v.dump_instructions();
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
- &prog_data->base, v.cfg);
+ &prog_data->base, v.cfg, stats);
}
return assembly;
diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
index b4ad21cf776..7309afc778e 100644
--- a/src/intel/compiler/brw_vec4.cpp
+++ b/src/intel/compiler/brw_vec4.cpp
@@ -2842,6 +2842,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
struct brw_vs_prog_data *prog_data,
nir_shader *shader,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str)
{
const bool is_scalar = compiler->scalar_stage[MESA_SHADER_VERTEX];
@@ -2986,7 +2987,7 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
g.enable_debug(debug_name);
}
- g.generate_code(v.cfg, 8);
+ g.generate_code(v.cfg, 8, stats);
assembly = g.get_assembly();
}
@@ -3003,7 +3004,8 @@ brw_compile_vs(const struct brw_compiler *compiler, void *log_data,
}
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
- shader, &prog_data->base, v.cfg);
+ shader, &prog_data->base,
+ v.cfg, stats);
}
return assembly;
diff --git a/src/intel/compiler/brw_vec4.h b/src/intel/compiler/brw_vec4.h
index ab2ecc47f58..a3831c6e1bd 100644
--- a/src/intel/compiler/brw_vec4.h
+++ b/src/intel/compiler/brw_vec4.h
@@ -45,7 +45,8 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
void *mem_ctx,
const nir_shader *nir,
struct brw_vue_prog_data *prog_data,
- const struct cfg_t *cfg);
+ const struct cfg_t *cfg,
+ struct brw_compile_stats *stats);
#ifdef __cplusplus
} /* extern "C" */
diff --git a/src/intel/compiler/brw_vec4_generator.cpp b/src/intel/compiler/brw_vec4_generator.cpp
index 338c638aeb5..e6842e47c8f 100644
--- a/src/intel/compiler/brw_vec4_generator.cpp
+++ b/src/intel/compiler/brw_vec4_generator.cpp
@@ -1497,7 +1497,8 @@ generate_code(struct brw_codegen *p,
void *log_data,
const nir_shader *nir,
struct brw_vue_prog_data *prog_data,
- const struct cfg_t *cfg)
+ const struct cfg_t *cfg,
+ struct brw_compile_stats *stats)
{
const struct gen_device_info *devinfo = p->devinfo;
const char *stage_abbrev = _mesa_shader_stage_to_abbrev(nir->info.stage);
@@ -2208,7 +2209,14 @@ generate_code(struct brw_codegen *p,
stage_abbrev, before_size / 16,
loop_count, cfg->cycle_count, spill_count,
fill_count, before_size, after_size);
-
+ if (stats) {
+ stats->dispatch_width = 0;
+ stats->instructions = before_size / 16;
+ stats->loops = loop_count;
+ stats->cycles = cfg->cycle_count;
+ stats->spills = spill_count;
+ stats->fills = fill_count;
+ }
}
extern "C" const unsigned *
@@ -2217,13 +2225,14 @@ brw_vec4_generate_assembly(const struct brw_compiler *compiler,
void *mem_ctx,
const nir_shader *nir,
struct brw_vue_prog_data *prog_data,
- const struct cfg_t *cfg)
+ const struct cfg_t *cfg,
+ struct brw_compile_stats *stats)
{
struct brw_codegen *p = rzalloc(mem_ctx, struct brw_codegen);
brw_init_codegen(compiler->devinfo, p, mem_ctx);
brw_set_default_access_mode(p, BRW_ALIGN_16);
- generate_code(p, compiler, log_data, nir, prog_data, cfg);
+ generate_code(p, compiler, log_data, nir, prog_data, cfg, stats);
return brw_get_program(p, &prog_data->base.program_size);
}
diff --git a/src/intel/compiler/brw_vec4_gs_visitor.cpp b/src/intel/compiler/brw_vec4_gs_visitor.cpp
index aae0e1b4baf..56eb1af870f 100644
--- a/src/intel/compiler/brw_vec4_gs_visitor.cpp
+++ b/src/intel/compiler/brw_vec4_gs_visitor.cpp
@@ -618,6 +618,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
nir_shader *shader,
struct gl_program *prog,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str)
{
struct brw_gs_compile c;
@@ -865,7 +866,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
label, shader->info.name);
g.enable_debug(name);
}
- g.generate_code(v.cfg, 8);
+ g.generate_code(v.cfg, 8, stats);
return g.get_assembly();
}
}
@@ -896,7 +897,8 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
/* Success! Backup is not needed */
ralloc_free(param);
return brw_vec4_generate_assembly(compiler, log_data, mem_ctx,
- shader, &prog_data->base, v.cfg);
+ shader, &prog_data->base,
+ v.cfg, stats);
} else {
/* These variables could be modified by the execution of the GS
* visitor if it packed the uniforms in the push constant buffer.
@@ -959,7 +961,7 @@ brw_compile_gs(const struct brw_compiler *compiler, void *log_data,
*error_str = ralloc_strdup(mem_ctx, gs->fail_msg);
} else {
ret = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, shader,
- &prog_data->base, gs->cfg);
+ &prog_data->base, gs->cfg, stats);
}
delete gs;
diff --git a/src/intel/compiler/brw_vec4_tcs.cpp b/src/intel/compiler/brw_vec4_tcs.cpp
index 734be075d6a..7747208f1da 100644
--- a/src/intel/compiler/brw_vec4_tcs.cpp
+++ b/src/intel/compiler/brw_vec4_tcs.cpp
@@ -329,6 +329,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
struct brw_tcs_prog_data *prog_data,
nir_shader *nir,
int shader_time_index,
+ struct brw_compile_stats *stats,
char **error_str)
{
const struct gen_device_info *devinfo = compiler->devinfo;
@@ -446,7 +447,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
nir->info.name));
}
- g.generate_code(v.cfg, 8);
+ g.generate_code(v.cfg, 8, stats);
assembly = g.get_assembly();
} else {
@@ -463,7 +464,7 @@ brw_compile_tcs(const struct brw_compiler *compiler,
assembly = brw_vec4_generate_assembly(compiler, log_data, mem_ctx, nir,
- &prog_data->base, v.cfg);
+ &prog_data->base, v.cfg, stats);
}
return assembly;
diff --git a/src/intel/vulkan/anv_pipeline.c b/src/intel/vulkan/anv_pipeline.c
index 87160aba802..dbca3a5ea08 100644
--- a/src/intel/vulkan/anv_pipeline.c
+++ b/src/intel/vulkan/anv_pipeline.c
@@ -748,7 +748,8 @@ anv_pipeline_compile_vs(const struct brw_compiler *compiler,
vs_stage->nir->info.separate_shader);
return brw_compile_vs(compiler, device, mem_ctx, &vs_stage->key.vs,
- &vs_stage->prog_data.vs, vs_stage->nir, -1, NULL);
+ &vs_stage->prog_data.vs, vs_stage->nir, -1,
+ NULL, NULL);
}
static void
@@ -832,7 +833,7 @@ anv_pipeline_compile_tcs(const struct brw_compiler *compiler,
return brw_compile_tcs(compiler, device, mem_ctx, &tcs_stage->key.tcs,
&tcs_stage->prog_data.tcs, tcs_stage->nir,
- -1, NULL);
+ -1, NULL, NULL);
}
static void
@@ -859,7 +860,7 @@ anv_pipeline_compile_tes(const struct brw_compiler *compiler,
return brw_compile_tes(compiler, device, mem_ctx, &tes_stage->key.tes,
&tcs_stage->prog_data.tcs.base.vue_map,
&tes_stage->prog_data.tes, tes_stage->nir,
- NULL, -1, NULL);
+ NULL, -1, NULL, NULL);
}
static void
@@ -885,7 +886,7 @@ anv_pipeline_compile_gs(const struct brw_compiler *compiler,
return brw_compile_gs(compiler, device, mem_ctx, &gs_stage->key.gs,
&gs_stage->prog_data.gs, gs_stage->nir,
- NULL, -1, NULL);
+ NULL, -1, NULL, NULL);
}
static void
@@ -1020,7 +1021,7 @@ anv_pipeline_compile_fs(const struct brw_compiler *compiler,
const unsigned *code =
brw_compile_fs(compiler, device, mem_ctx, &fs_stage->key.wm,
&fs_stage->prog_data.wm, fs_stage->nir,
- NULL, -1, -1, -1, true, false, NULL, NULL);
+ NULL, -1, -1, -1, true, false, NULL, NULL, NULL);
if (fs_stage->key.wm.nr_color_regions == 0 &&
!fs_stage->prog_data.wm.has_side_effects &&
@@ -1445,7 +1446,7 @@ anv_pipeline_compile_cs(struct anv_pipeline *pipeline,
const unsigned *shader_code =
brw_compile_cs(compiler, pipeline->device, mem_ctx, &stage.key.cs,
- &stage.prog_data.cs, stage.nir, -1, NULL);
+ &stage.prog_data.cs, stage.nir, -1, NULL, NULL);
if (shader_code == NULL) {
ralloc_free(mem_ctx);
return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);