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-rw-r--r--src/intel/vulkan/gen8_pipeline.c40
1 files changed, 0 insertions, 40 deletions
diff --git a/src/intel/vulkan/gen8_pipeline.c b/src/intel/vulkan/gen8_pipeline.c
index 1840ce231e6..445177a84f5 100644
--- a/src/intel/vulkan/gen8_pipeline.c
+++ b/src/intel/vulkan/gen8_pipeline.c
@@ -44,46 +44,6 @@ emit_ia_state(struct anv_pipeline *pipeline,
}
}
-static void
-emit_ms_state(struct anv_pipeline *pipeline,
- const VkPipelineMultisampleStateCreateInfo *info)
-{
- uint32_t samples = 1;
- uint32_t log2_samples = 0;
-
- /* From the Vulkan 1.0 spec:
- * If pSampleMask is NULL, it is treated as if the mask has all bits
- * enabled, i.e. no coverage is removed from fragments.
- *
- * 3DSTATE_SAMPLE_MASK.SampleMask is 16 bits.
- */
- uint32_t sample_mask = 0xffff;
-
- if (info) {
- samples = info->rasterizationSamples;
- log2_samples = __builtin_ffs(samples) - 1;
- }
-
- if (info && info->pSampleMask)
- sample_mask &= info->pSampleMask[0];
-
- anv_batch_emit(&pipeline->batch, GENX(3DSTATE_MULTISAMPLE), ms) {
- /* The PRM says that this bit is valid only for DX9:
- *
- * SW can choose to set this bit only for DX9 API. DX10/OGL API's
- * should not have any effect by setting or not setting this bit.
- */
- ms.PixelPositionOffsetEnable = false;
-
- ms.PixelLocation = CENTER;
- ms.NumberofMultisamples = log2_samples;
- }
-
- anv_batch_emit(&pipeline->batch, GENX(3DSTATE_SAMPLE_MASK), sm) {
- sm.SampleMask = sample_mask;
- }
-}
-
VkResult
genX(graphics_pipeline_create)(
VkDevice _device,