1 files changed, 0 insertions, 111 deletions
diff --git a/src/intel/vulkan/gen7_state.c b/src/intel/vulkan/gen7_state.c
index 48c41faf57f..ac5b5ed21cd 100644
--- a/src/intel/vulkan/gen7_state.c
+++ b/src/intel/vulkan/gen7_state.c
@@ -154,114 +154,3 @@ VkResult genX(CreateSampler)(
 
    return VK_SUCCESS;
 }
-
-static const uint8_t anv_halign[] = {
-    [4] = HALIGN_4,
-    [8] = HALIGN_8,
-};
-
-static const uint8_t anv_valign[] = {
-    [2] = VALIGN_2,
-    [4] = VALIGN_4,
-};
-
-void
-genX(fill_image_surface_state)(struct anv_device *device, void *state_map,
-                               struct anv_image_view *iview,
-                               const VkImageViewCreateInfo *pCreateInfo,
-                               VkImageUsageFlagBits usage)
-{
-   if (pCreateInfo->viewType != VK_IMAGE_VIEW_TYPE_2D)
-      anv_finishme("non-2D image views");
-
-   assert(usage & (VK_IMAGE_USAGE_SAMPLED_BIT |
-                   VK_IMAGE_USAGE_STORAGE_BIT |
-                   VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT));
-   assert(util_is_power_of_two(usage));
-
-   ANV_FROM_HANDLE(anv_image, image, pCreateInfo->image);
-   const VkImageSubresourceRange *range = &pCreateInfo->subresourceRange;
-   bool is_storage = (usage == VK_IMAGE_USAGE_STORAGE_BIT);
-   struct anv_surface *surface =
-      anv_image_get_surface_for_aspect_mask(image, range->aspectMask);
-
-   uint32_t depth = 1;
-   if (range->layerCount > 1) {
-      depth = range->layerCount;
-   } else if (image->extent.depth > 1) {
-      depth = image->extent.depth;
-   }
-
-   const struct isl_extent3d image_align_sa =
-      isl_surf_get_image_alignment_sa(&surface->isl);
-
-   struct GENX(RENDER_SURFACE_STATE) template = {
-      .SurfaceType = anv_surftype(image, pCreateInfo->viewType,
-                                  usage == VK_IMAGE_USAGE_STORAGE_BIT),
-      .SurfaceArray = image->array_size > 1,
-      .SurfaceFormat = anv_surface_format(device, iview->format, is_storage),
-      .SurfaceVerticalAlignment = anv_valign[image_align_sa.height],
-      .SurfaceHorizontalAlignment = anv_halign[image_align_sa.width],
-
-      /* From bspec (DevSNB, DevIVB): "Set Tile Walk to TILEWALK_XMAJOR if
-       * Tiled Surface is False."
-       */
-      .TiledSurface = surface->isl.tiling != ISL_TILING_LINEAR,
-      .TileWalk = surface->isl.tiling == ISL_TILING_Y0 ?
-                  TILEWALK_YMAJOR : TILEWALK_XMAJOR,
-
-      .VerticalLineStride = 0,
-      .VerticalLineStrideOffset = 0,
-
-      .RenderCacheReadWriteMode = 0, /* TEMPLATE */
-
-      .Height = image->extent.height - 1,
-      .Width = image->extent.width - 1,
-      .Depth = depth - 1,
-      .SurfacePitch = surface->isl.row_pitch - 1,
-      .MinimumArrayElement = range->baseArrayLayer,
-      .NumberofMultisamples = MULTISAMPLECOUNT_1,
-      .XOffset = 0,
-      .YOffset = 0,
-
-      .SurfaceObjectControlState = GENX(MOCS),
-
-      .MIPCountLOD = 0, /* TEMPLATE */
-      .SurfaceMinLOD = 0, /* TEMPLATE */
-
-      .MCSEnable = false,
-#  if (GEN_IS_HASWELL)
-      .ShaderChannelSelectRed = vk_to_gen_swizzle[iview->swizzle.r],
-      .ShaderChannelSelectGreen = vk_to_gen_swizzle[iview->swizzle.g],
-      .ShaderChannelSelectBlue = vk_to_gen_swizzle[iview->swizzle.b],
-      .ShaderChannelSelectAlpha = vk_to_gen_swizzle[iview->swizzle.a],
-#  else /* XXX: Seriously? */
-      .RedClearColor = 0,
-      .GreenClearColor = 0,
-      .BlueClearColor = 0,
-      .AlphaClearColor = 0,
-#  endif
-      .ResourceMinLOD = 0.0,
-      .SurfaceBaseAddress = { NULL, iview->offset },
-   };
-
-   if (usage == VK_IMAGE_USAGE_COLOR_ATTACHMENT_BIT) {
-      /* For render target surfaces, the hardware interprets field
-       * MIPCount/LOD as LOD. The Broadwell PRM says:
-       *
-       *    MIPCountLOD defines the LOD that will be rendered into.
-       *    SurfaceMinLOD is ignored.
-       */
-      template.MIPCountLOD = range->baseMipLevel;
-      template.SurfaceMinLOD = 0;
-   } else {
-      /* For non render target surfaces, the hardware interprets field
-       * MIPCount/LOD as MIPCount.  The range of levels accessible by the
-       * sampler engine is [SurfaceMinLOD, SurfaceMinLOD + MIPCountLOD].
-       */
-      template.SurfaceMinLOD = range->baseMipLevel;
-      template.MIPCountLOD = MAX2(range->levelCount, 1) - 1;
-   }
-
-   GENX(RENDER_SURFACE_STATE_pack)(NULL, state_map, &template);
-}