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-rw-r--r--src/intel/genxml/gen7.xml4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/intel/genxml/gen7.xml b/src/intel/genxml/gen7.xml
index 4865843fcbb..baf42a7d32d 100644
--- a/src/intel/genxml/gen7.xml
+++ b/src/intel/genxml/gen7.xml
@@ -2020,6 +2020,10 @@
<field name="DWord Length" start="0" end="7" type="uint" default="1"/>
<field name="Register Offset" start="34" end="54" type="offset"/>
<field name="Data DWord" start="64" end="95" type="uint"/>
+ <group count="0" start="96" size="64">
+ <field name="Register Offset" start="2" end="22" type="offset"/>
+ <field name="Data DWord" start="32" end="63" type="uint"/>
+ </group>
</instruction>
<instruction name="MI_LOAD_REGISTER_MEM" bias="2" length="3">