diff options
Diffstat (limited to 'src/intel/compiler/brw_fs.cpp')
| -rw-r--r-- | src/intel/compiler/brw_fs.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp index 47f1f6e9c9f..9f1b8d0b184 100644 --- a/src/intel/compiler/brw_fs.cpp +++ b/src/intel/compiler/brw_fs.cpp @@ -316,6 +316,15 @@ fs_inst::has_source_and_destination_hazard() const * that one of the instructions will read from a channel corresponding * to an earlier instruction. */ + case SHADER_OPCODE_SEL_EXEC: + /* This is implemented as + * + * mov(16) g4<1>D 0D { align1 WE_all 1H }; + * mov(16) g4<1>D g5<8,8,1>D { align1 1H } + * + * Because the source is only read in the second instruction, the first + * may stomp all over it. + */ return true; default: /* The SIMD16 compressed instruction @@ -5038,6 +5047,8 @@ get_lowered_simd_width(const struct gen_device_info *devinfo, case BRW_OPCODE_MAD: case BRW_OPCODE_LRP: case FS_OPCODE_PACK: + case SHADER_OPCODE_SEL_EXEC: + case SHADER_OPCODE_CLUSTER_BROADCAST: return get_fpu_lowered_simd_width(devinfo, inst); case BRW_OPCODE_CMP: { |