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-rw-r--r--src/gallium/drivers/r600/SConscript2
-rw-r--r--src/gallium/drivers/r600/r600_asm.c32
-rw-r--r--src/gallium/drivers/r600/r600_pipe.h2
-rw-r--r--src/gallium/drivers/r600/r600_shader.c2
-rw-r--r--src/gallium/drivers/r600/r600_texture.c12
-rw-r--r--src/gallium/winsys/r600/drm/bof.c2
-rw-r--r--src/gallium/winsys/r600/drm/radeon_bo.c4
-rw-r--r--src/gallium/winsys/r600/drm/radeon_pciid.c76
8 files changed, 66 insertions, 66 deletions
diff --git a/src/gallium/drivers/r600/SConscript b/src/gallium/drivers/r600/SConscript
index 64980140963..e51f50c5df5 100644
--- a/src/gallium/drivers/r600/SConscript
+++ b/src/gallium/drivers/r600/SConscript
@@ -9,7 +9,7 @@ except OSError:
Return()
env.Append(CPPPATH = [
- '#/include',
+ '#/include',
'#/src/mesa',
])
diff --git a/src/gallium/drivers/r600/r600_asm.c b/src/gallium/drivers/r600/r600_asm.c
index 7ade0c727bf..78cb60e1b3a 100644
--- a/src/gallium/drivers/r600/r600_asm.c
+++ b/src/gallium/drivers/r600/r600_asm.c
@@ -527,7 +527,7 @@ static void init_bank_swizzle(struct alu_bank_swizzle *bs)
for (i = 0; i < 4; i++)
bs->hw_cfile_elem[i] = -1;
}
-
+
static int reserve_gpr(struct alu_bank_swizzle *bs, unsigned sel, unsigned chan, unsigned cycle)
{
if (bs->hw_gpr[cycle][chan] == -1)
@@ -538,7 +538,7 @@ static int reserve_gpr(struct alu_bank_swizzle *bs, unsigned sel, unsigned chan,
}
return 0;
}
-
+
static int reserve_cfile(struct alu_bank_swizzle *bs, unsigned sel, unsigned chan)
{
int res, resmatch = -1, resempty = -1;
@@ -558,9 +558,9 @@ static int reserve_cfile(struct alu_bank_swizzle *bs, unsigned sel, unsigned cha
// All cfile read ports are used, cannot reference vector element
return -1;
}
- return 0;
+ return 0;
}
-
+
static int is_gpr(unsigned sel)
{
return (sel >= 0 && sel <= 127);
@@ -575,19 +575,19 @@ static int is_cfile(unsigned sel)
(sel > 511 && sel < 4607) || // Kcache before translate
(sel > 127 && sel < 192); // Kcache after translate
}
-
+
static int is_const(int sel)
{
return is_cfile(sel) ||
- (sel >= V_SQ_ALU_SRC_0 &&
+ (sel >= V_SQ_ALU_SRC_0 &&
sel <= V_SQ_ALU_SRC_LITERAL);
}
-
+
static int check_vector(struct r600_bc *bc, struct r600_bc_alu *alu,
struct alu_bank_swizzle *bs, int bank_swizzle)
{
int r, src, num_src, sel, elem, cycle;
-
+
num_src = r600_bc_get_num_operands(bc, alu);
for (src = 0; src < num_src; src++) {
sel = alu->src[src].sel;
@@ -595,7 +595,7 @@ static int check_vector(struct r600_bc *bc, struct r600_bc_alu *alu,
if (is_gpr(sel)) {
cycle = cycle_for_bank_swizzle_vec[bank_swizzle][src];
if (src == 1 && sel == alu->src[0].sel && elem == alu->src[0].chan)
- // Nothing to do; special-case optimization,
+ // Nothing to do; special-case optimization,
// second source uses first source’s reservation
continue;
else {
@@ -612,12 +612,12 @@ static int check_vector(struct r600_bc *bc, struct r600_bc_alu *alu,
}
return 0;
}
-
+
static int check_scalar(struct r600_bc *bc, struct r600_bc_alu *alu,
struct alu_bank_swizzle *bs, int bank_swizzle)
{
int r, src, num_src, const_count, sel, elem, cycle;
-
+
num_src = r600_bc_get_num_operands(bc, alu);
for (const_count = 0, src = 0; src < num_src; ++src) {
sel = alu->src[src].sel;
@@ -626,7 +626,7 @@ static int check_scalar(struct r600_bc *bc, struct r600_bc_alu *alu,
if (const_count >= 2)
// More than two references to a constant in
// transcendental operation.
- return -1;
+ return -1;
else
const_count++;
}
@@ -661,7 +661,7 @@ static int check_and_set_bank_swizzle(struct r600_bc *bc,
struct alu_bank_swizzle bs;
int bank_swizzle[5];
int i, r = 0, forced = 0;
-
+
for (i = 0; i < 5; i++)
if (slots[i] && slots[i]->bank_swizzle_force) {
slots[i]->bank_swizzle = slots[i]->bank_swizzle_force;
@@ -846,7 +846,7 @@ static int merge_inst_groups(struct r600_bc *bc, struct r600_bc_alu *slots[5],
{
struct r600_bc_alu *prev[5];
struct r600_bc_alu *result[5] = { NULL };
-
+
uint32_t literal[4], prev_literal[4];
unsigned nliteral = 0, prev_nliteral = 0;
@@ -896,7 +896,7 @@ static int merge_inst_groups(struct r600_bc *bc, struct r600_bc_alu *slots[5],
return 0;
} else if(!slots[i]) {
continue;
- } else
+ } else
result[i] = slots[i];
// let's check source gprs
@@ -1134,7 +1134,7 @@ int r600_bc_add_alu_type(struct r600_bc *bc, const struct r600_bc_alu *alu, int
}
if (nalu->src[i].sel == V_SQ_ALU_SRC_LITERAL)
r600_bc_special_constants(
- nalu->src[i].value[nalu->src[i].chan],
+ nalu->src[i].value[nalu->src[i].chan],
&nalu->src[i].sel, &nalu->src[i].neg);
}
if (nalu->dst.sel >= bc->ngpr) {
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 2112a40f696..7f74fda0daf 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -241,7 +241,7 @@ int r600_conv_pipe_prim(unsigned pprim, unsigned *prim);
void r600_init_screen_texture_functions(struct pipe_screen *screen);
void r600_init_surface_functions(struct r600_pipe_context *r600);
uint32_t r600_translate_texformat(enum pipe_format format,
- const unsigned char *swizzle_view,
+ const unsigned char *swizzle_view,
uint32_t *word4_p, uint32_t *yuv_format_p);
unsigned r600_texture_get_offset(struct r600_resource_texture *rtex,
unsigned level, unsigned layer);
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 06ad817a638..5c5ff4e7394 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -747,7 +747,7 @@ static int tgsi_src(struct r600_shader_ctx *ctx,
memset(r600_src, 0, sizeof(struct r600_bc_alu_src));
r600_src->neg = tgsi_src->Register.Negate;
r600_src->abs = tgsi_src->Register.Absolute;
- if (tgsi_src->Register.File == TGSI_FILE_IMMEDIATE) {
+ if (tgsi_src->Register.File == TGSI_FILE_IMMEDIATE) {
int index;
if((tgsi_src->Register.SwizzleX == tgsi_src->Register.SwizzleY) &&
(tgsi_src->Register.SwizzleX == tgsi_src->Register.SwizzleZ) &&
diff --git a/src/gallium/drivers/r600/r600_texture.c b/src/gallium/drivers/r600/r600_texture.c
index e2745624575..91032e83825 100644
--- a/src/gallium/drivers/r600/r600_texture.c
+++ b/src/gallium/drivers/r600/r600_texture.c
@@ -794,7 +794,7 @@ static unsigned r600_get_swizzle_combined(const unsigned char *swizzle_format,
/* texture format translate */
uint32_t r600_translate_texformat(enum pipe_format format,
- const unsigned char *swizzle_view,
+ const unsigned char *swizzle_view,
uint32_t *word4_p, uint32_t *yuv_format_p)
{
uint32_t result = 0, word4 = 0, yuv_format = 0;
@@ -848,7 +848,7 @@ uint32_t r600_translate_texformat(enum pipe_format format,
break;
}
goto out_unknown; /* TODO */
-
+
case UTIL_FORMAT_COLORSPACE_SRGB:
word4 |= S_038010_FORCE_DEGAMMA(1);
if (format == PIPE_FORMAT_L8A8_SRGB || format == PIPE_FORMAT_L8_SRGB)
@@ -864,7 +864,7 @@ uint32_t r600_translate_texformat(enum pipe_format format,
static int r600_enable_s3tc = -1;
if (r600_enable_s3tc == -1)
- r600_enable_s3tc =
+ r600_enable_s3tc =
debug_get_bool_option("R600_ENABLE_S3TC", FALSE);
if (!r600_enable_s3tc)
@@ -887,7 +887,7 @@ uint32_t r600_translate_texformat(enum pipe_format format,
}
- for (i = 0; i < desc->nr_channels; i++) {
+ for (i = 0; i < desc->nr_channels; i++) {
if (desc->channel[i].type == UTIL_FORMAT_TYPE_SIGNED) {
word4 |= sign_bit[i];
}
@@ -901,7 +901,7 @@ uint32_t r600_translate_texformat(enum pipe_format format,
for (i = 1; i < desc->nr_channels; i++) {
uniform = uniform && desc->channel[0].size == desc->channel[i].size;
}
-
+
/* Non-uniform formats. */
if (!uniform) {
switch(desc->nr_channels) {
@@ -1019,7 +1019,7 @@ uint32_t r600_translate_texformat(enum pipe_format format,
goto out_word4;
}
}
-
+
}
out_word4:
if (word4_p)
diff --git a/src/gallium/winsys/r600/drm/bof.c b/src/gallium/winsys/r600/drm/bof.c
index 0598cc6bc0f..5c923ad38d6 100644
--- a/src/gallium/winsys/r600/drm/bof.c
+++ b/src/gallium/winsys/r600/drm/bof.c
@@ -46,7 +46,7 @@ static int bof_entry_grow(bof_t *bof)
}
/*
- * object
+ * object
*/
bof_t *bof_object(void)
{
diff --git a/src/gallium/winsys/r600/drm/radeon_bo.c b/src/gallium/winsys/r600/drm/radeon_bo.c
index 7e5f392efae..999de82646d 100644
--- a/src/gallium/winsys/r600/drm/radeon_bo.c
+++ b/src/gallium/winsys/r600/drm/radeon_bo.c
@@ -206,13 +206,13 @@ int radeon_bo_get_tiling_flags(struct radeon *radeon,
{
struct drm_radeon_gem_get_tiling args;
int ret;
-
+
args.handle = bo->handle;
ret = drmCommandWriteRead(radeon->fd, DRM_RADEON_GEM_GET_TILING,
&args, sizeof(args));
if (ret)
return ret;
-
+
*tiling_flags = args.tiling_flags;
*pitch = args.pitch;
return ret;
diff --git a/src/gallium/winsys/r600/drm/radeon_pciid.c b/src/gallium/winsys/r600/drm/radeon_pciid.c
index e2622abd468..06681791e57 100644
--- a/src/gallium/winsys/r600/drm/radeon_pciid.c
+++ b/src/gallium/winsys/r600/drm/radeon_pciid.c
@@ -40,29 +40,29 @@ struct pci_id radeon_pci_id[] = {
{0x1002, 0x3E54, CHIP_RV380},
{0x1002, 0x4136, CHIP_RS100},
{0x1002, 0x4137, CHIP_RS200},
- {0x1002, 0x4144, CHIP_R300},
- {0x1002, 0x4145, CHIP_R300},
- {0x1002, 0x4146, CHIP_R300},
- {0x1002, 0x4147, CHIP_R300},
- {0x1002, 0x4148, CHIP_R350},
- {0x1002, 0x4149, CHIP_R350},
- {0x1002, 0x414A, CHIP_R350},
- {0x1002, 0x414B, CHIP_R350},
- {0x1002, 0x4150, CHIP_RV350},
- {0x1002, 0x4151, CHIP_RV350},
- {0x1002, 0x4152, CHIP_RV350},
- {0x1002, 0x4153, CHIP_RV350},
- {0x1002, 0x4154, CHIP_RV350},
- {0x1002, 0x4155, CHIP_RV350},
- {0x1002, 0x4156, CHIP_RV350},
+ {0x1002, 0x4144, CHIP_R300},
+ {0x1002, 0x4145, CHIP_R300},
+ {0x1002, 0x4146, CHIP_R300},
+ {0x1002, 0x4147, CHIP_R300},
+ {0x1002, 0x4148, CHIP_R350},
+ {0x1002, 0x4149, CHIP_R350},
+ {0x1002, 0x414A, CHIP_R350},
+ {0x1002, 0x414B, CHIP_R350},
+ {0x1002, 0x4150, CHIP_RV350},
+ {0x1002, 0x4151, CHIP_RV350},
+ {0x1002, 0x4152, CHIP_RV350},
+ {0x1002, 0x4153, CHIP_RV350},
+ {0x1002, 0x4154, CHIP_RV350},
+ {0x1002, 0x4155, CHIP_RV350},
+ {0x1002, 0x4156, CHIP_RV350},
{0x1002, 0x4237, CHIP_RS200},
- {0x1002, 0x4242, CHIP_R200},
- {0x1002, 0x4243, CHIP_R200},
+ {0x1002, 0x4242, CHIP_R200},
+ {0x1002, 0x4243, CHIP_R200},
{0x1002, 0x4336, CHIP_RS100},
{0x1002, 0x4337, CHIP_RS200},
{0x1002, 0x4437, CHIP_RS200},
- {0x1002, 0x4966, CHIP_RV250},
- {0x1002, 0x4967, CHIP_RV250},
+ {0x1002, 0x4966, CHIP_RV250},
+ {0x1002, 0x4967, CHIP_RV250},
{0x1002, 0x4A48, CHIP_R420},
{0x1002, 0x4A49, CHIP_R420},
{0x1002, 0x4A4A, CHIP_R420},
@@ -85,14 +85,14 @@ struct pci_id radeon_pci_id[] = {
{0x1002, 0x4C64, CHIP_RV250},
{0x1002, 0x4C66, CHIP_RV250},
{0x1002, 0x4C67, CHIP_RV250},
- {0x1002, 0x4E44, CHIP_R300},
- {0x1002, 0x4E45, CHIP_R300},
- {0x1002, 0x4E46, CHIP_R300},
- {0x1002, 0x4E47, CHIP_R300},
- {0x1002, 0x4E48, CHIP_R350},
- {0x1002, 0x4E49, CHIP_R350},
- {0x1002, 0x4E4A, CHIP_R350},
- {0x1002, 0x4E4B, CHIP_R350},
+ {0x1002, 0x4E44, CHIP_R300},
+ {0x1002, 0x4E45, CHIP_R300},
+ {0x1002, 0x4E46, CHIP_R300},
+ {0x1002, 0x4E47, CHIP_R300},
+ {0x1002, 0x4E48, CHIP_R350},
+ {0x1002, 0x4E49, CHIP_R350},
+ {0x1002, 0x4E4A, CHIP_R350},
+ {0x1002, 0x4E4B, CHIP_R350},
{0x1002, 0x4E50, CHIP_RV350},
{0x1002, 0x4E51, CHIP_RV350},
{0x1002, 0x4E52, CHIP_RV350},
@@ -103,13 +103,13 @@ struct pci_id radeon_pci_id[] = {
{0x1002, 0x5145, CHIP_R100},
{0x1002, 0x5146, CHIP_R100},
{0x1002, 0x5147, CHIP_R100},
- {0x1002, 0x5148, CHIP_R200},
- {0x1002, 0x514C, CHIP_R200},
- {0x1002, 0x514D, CHIP_R200},
- {0x1002, 0x5157, CHIP_RV200},
- {0x1002, 0x5158, CHIP_RV200},
- {0x1002, 0x5159, CHIP_RV100},
- {0x1002, 0x515A, CHIP_RV100},
+ {0x1002, 0x5148, CHIP_R200},
+ {0x1002, 0x514C, CHIP_R200},
+ {0x1002, 0x514D, CHIP_R200},
+ {0x1002, 0x5157, CHIP_RV200},
+ {0x1002, 0x5158, CHIP_RV200},
+ {0x1002, 0x5159, CHIP_RV100},
+ {0x1002, 0x515A, CHIP_RV100},
{0x1002, 0x515E, CHIP_RV100},
{0x1002, 0x5460, CHIP_RV380},
{0x1002, 0x5462, CHIP_RV380},
@@ -138,10 +138,10 @@ struct pci_id radeon_pci_id[] = {
{0x1002, 0x5955, CHIP_RS480},
{0x1002, 0x5974, CHIP_RS480},
{0x1002, 0x5975, CHIP_RS480},
- {0x1002, 0x5960, CHIP_RV280},
- {0x1002, 0x5961, CHIP_RV280},
- {0x1002, 0x5962, CHIP_RV280},
- {0x1002, 0x5964, CHIP_RV280},
+ {0x1002, 0x5960, CHIP_RV280},
+ {0x1002, 0x5961, CHIP_RV280},
+ {0x1002, 0x5962, CHIP_RV280},
+ {0x1002, 0x5964, CHIP_RV280},
{0x1002, 0x5965, CHIP_RV280},
{0x1002, 0x5969, CHIP_RV100},
{0x1002, 0x5a41, CHIP_RS400},
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-02 11:33:43 +0000