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-rw-r--r--src/gallium/drivers/ilo/ilo_resource.c21
-rw-r--r--src/gallium/winsys/intel/drm/intel_drm_winsys.c68
-rw-r--r--src/gallium/winsys/intel/intel_winsys.h40
3 files changed, 66 insertions, 63 deletions
diff --git a/src/gallium/drivers/ilo/ilo_resource.c b/src/gallium/drivers/ilo/ilo_resource.c
index 1b291002489..8824b97ebc6 100644
--- a/src/gallium/drivers/ilo/ilo_resource.c
+++ b/src/gallium/drivers/ilo/ilo_resource.c
@@ -868,6 +868,8 @@ tex_create_bo(struct ilo_texture *tex,
struct ilo_screen *is = ilo_screen(tex->base.screen);
const char *name;
struct intel_bo *bo;
+ enum intel_tiling_mode tiling;
+ unsigned long pitch;
switch (tex->base.target) {
case PIPE_TEXTURE_1D:
@@ -900,13 +902,16 @@ tex_create_bo(struct ilo_texture *tex,
}
if (handle) {
- bo = intel_winsys_import_handle(is->winsys, name,
- tex->bo_width, tex->bo_height, tex->bo_cpp, handle);
+ bo = intel_winsys_import_handle(is->winsys, name, handle,
+ tex->bo_width, tex->bo_height, tex->bo_cpp,
+ &tiling, &pitch);
}
else {
- bo = intel_winsys_alloc(is->winsys, name,
+ bo = intel_winsys_alloc_texture(is->winsys, name,
tex->bo_width, tex->bo_height, tex->bo_cpp,
- tex->tiling, tex->bo_flags);
+ tex->tiling, tex->bo_flags, &pitch);
+
+ tiling = tex->tiling;
}
if (!bo)
@@ -916,8 +921,8 @@ tex_create_bo(struct ilo_texture *tex,
intel_bo_unreference(tex->bo);
tex->bo = bo;
- tex->tiling = intel_bo_get_tiling(bo);
- tex->bo_stride = intel_bo_get_pitch(bo);
+ tex->tiling = tiling;
+ tex->bo_stride = pitch;
return true;
}
@@ -1034,9 +1039,11 @@ tex_create(struct pipe_screen *screen,
static bool
tex_get_handle(struct ilo_texture *tex, struct winsys_handle *handle)
{
+ struct ilo_screen *is = ilo_screen(tex->base.screen);
int err;
- err = intel_bo_export_handle(tex->bo, handle);
+ err = intel_winsys_export_handle(is->winsys, tex->bo,
+ tex->tiling, tex->bo_stride, handle);
return !err;
}
diff --git a/src/gallium/winsys/intel/drm/intel_drm_winsys.c b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
index e75eb4f6f61..d44113873cb 100644
--- a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
+++ b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
@@ -59,12 +59,14 @@ struct intel_bo {
struct pipe_reference reference;
drm_intel_bo *bo;
- enum intel_tiling_mode tiling;
- unsigned long pitch;
};
int
-intel_bo_export_handle(struct intel_bo *bo, struct winsys_handle *handle)
+intel_winsys_export_handle(struct intel_winsys *winsys,
+ struct intel_bo *bo,
+ enum intel_tiling_mode tiling,
+ unsigned long pitch,
+ struct winsys_handle *handle)
{
int err = 0;
@@ -100,7 +102,7 @@ intel_bo_export_handle(struct intel_bo *bo, struct winsys_handle *handle)
if (err)
return err;
- handle->stride = bo->pitch;
+ handle->stride = pitch;
return 0;
}
@@ -176,10 +178,13 @@ intel_bo_map_unsynchronized(struct intel_bo *bo)
return drm_intel_gem_bo_map_unsynchronized(bo->bo);
}
-int
+void
intel_bo_unmap(struct intel_bo *bo)
{
- return drm_intel_bo_unmap(bo->bo);
+ int err;
+
+ err = drm_intel_bo_unmap(bo->bo);
+ assert(!err);
}
int
@@ -214,18 +219,6 @@ intel_bo_get_virtual(const struct intel_bo *bo)
return bo->bo->virtual;
}
-enum intel_tiling_mode
-intel_bo_get_tiling(const struct intel_bo *bo)
-{
- return bo->tiling;
-}
-
-unsigned long
-intel_bo_get_pitch(const struct intel_bo *bo)
-{
- return bo->pitch;
-}
-
void
intel_bo_reference(struct intel_bo *bo)
{
@@ -251,36 +244,38 @@ create_bo(void)
return NULL;
pipe_reference_init(&bo->reference, 1);
- bo->tiling = INTEL_TILING_NONE;
- bo->pitch = 0;
return bo;
}
struct intel_bo *
-intel_winsys_alloc(struct intel_winsys *winsys,
- const char *name,
- int width, int height, int cpp,
- enum intel_tiling_mode tiling,
- unsigned long flags)
+intel_winsys_alloc_texture(struct intel_winsys *winsys,
+ const char *name,
+ int width, int height, int cpp,
+ enum intel_tiling_mode tiling,
+ unsigned long flags,
+ unsigned long *pitch)
{
struct intel_bo *bo;
uint32_t real_tiling = tiling;
- unsigned long pitch;
bo = create_bo();
if (!bo)
return NULL;
bo->bo = drm_intel_bo_alloc_tiled(winsys->bufmgr, name,
- width, height, cpp, &real_tiling, &pitch, flags);
+ width, height, cpp, &real_tiling, pitch, flags);
if (!bo->bo) {
FREE(bo);
return NULL;
}
- bo->tiling = real_tiling;
- bo->pitch = pitch;
+ if (tiling != real_tiling) {
+ assert(!"tiling mis-match");
+ drm_intel_bo_unreference(bo->bo);
+ FREE(bo);
+ return NULL;
+ }
return bo;
}
@@ -318,12 +313,13 @@ intel_winsys_alloc_buffer(struct intel_winsys *winsys,
struct intel_bo *
intel_winsys_import_handle(struct intel_winsys *winsys,
const char *name,
+ const struct winsys_handle *handle,
int width, int height, int cpp,
- const struct winsys_handle *handle)
+ enum intel_tiling_mode *tiling,
+ unsigned long *pitch)
{
struct intel_bo *bo;
- const unsigned long pitch = handle->stride;
- uint32_t tiling, swizzle;
+ uint32_t real_tiling, swizzle;
int err;
bo = create_bo();
@@ -343,7 +339,7 @@ intel_winsys_import_handle(struct intel_winsys *winsys,
{
const int fd = (int) handle->handle;
bo->bo = drm_intel_bo_gem_create_from_prime(winsys->bufmgr,
- fd, height * pitch);
+ fd, height * handle->stride);
}
break;
#endif
@@ -356,15 +352,15 @@ intel_winsys_import_handle(struct intel_winsys *winsys,
return NULL;
}
- err = drm_intel_bo_get_tiling(bo->bo, &tiling, &swizzle);
+ err = drm_intel_bo_get_tiling(bo->bo, &real_tiling, &swizzle);
if (err) {
drm_intel_bo_unreference(bo->bo);
FREE(bo);
return NULL;
}
- bo->tiling = tiling;
- bo->pitch = pitch;
+ *tiling = real_tiling;
+ *pitch = handle->stride;
return bo;
}
diff --git a/src/gallium/winsys/intel/intel_winsys.h b/src/gallium/winsys/intel/intel_winsys.h
index deed94e2ea6..89df2a16935 100644
--- a/src/gallium/winsys/intel/intel_winsys.h
+++ b/src/gallium/winsys/intel/intel_winsys.h
@@ -109,17 +109,30 @@ intel_winsys_alloc_buffer(struct intel_winsys *winsys,
unsigned long flags);
struct intel_bo *
-intel_winsys_alloc(struct intel_winsys *winsys,
- const char *name,
- int width, int height, int cpp,
- enum intel_tiling_mode tiling,
- unsigned long flags);
+intel_winsys_alloc_texture(struct intel_winsys *winsys,
+ const char *name,
+ int width, int height, int cpp,
+ enum intel_tiling_mode tiling,
+ unsigned long flags,
+ unsigned long *pitch);
struct intel_bo *
intel_winsys_import_handle(struct intel_winsys *winsys,
const char *name,
+ const struct winsys_handle *handle,
int width, int height, int cpp,
- const struct winsys_handle *handle);
+ enum intel_tiling_mode *tiling,
+ unsigned long *pitch);
+
+/**
+ * Export a handle for inter-process sharing.
+ */
+int
+intel_winsys_export_handle(struct intel_winsys *winsys,
+ struct intel_bo *bo,
+ enum intel_tiling_mode tiling,
+ unsigned long pitch,
+ struct winsys_handle *handle);
int
intel_winsys_check_aperture_space(struct intel_winsys *winsys,
@@ -145,12 +158,6 @@ intel_bo_get_offset(const struct intel_bo *bo);
void *
intel_bo_get_virtual(const struct intel_bo *bo);
-enum intel_tiling_mode
-intel_bo_get_tiling(const struct intel_bo *bo);
-
-unsigned long
-intel_bo_get_pitch(const struct intel_bo *bo);
-
/**
* Map/unmap \p bo for CPU access.
*
@@ -176,7 +183,7 @@ intel_bo_map_gtt(struct intel_bo *bo);
int
intel_bo_map_unsynchronized(struct intel_bo *bo);
-int
+void
intel_bo_unmap(struct intel_bo *bo);
/**
@@ -243,13 +250,6 @@ int
intel_bo_wait(struct intel_bo *bo, int64_t timeout);
/**
- * Export a handle for inter-process sharing.
- */
-int
-intel_bo_export_handle(struct intel_bo *bo,
- struct winsys_handle *handle);
-
-/**
* Return true if \p bo is busy.
*/
static inline bool
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-18 10:55:17 +0000