3 files changed, 3 insertions, 36 deletions
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index 405833d3ba7..3afdca52ea6 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -2450,30 +2450,6 @@ static LLVMValueRef fetch_constant(
 	/* Fast path when user data SGPRs point to constant buffer 0 directly. */
 	if (sel->info.const_buffers_declared == 1 &&
 	    sel->info.shader_buffers_declared == 0) {
-
-		/* This enables use of s_load_dword and flat_load_dword for const buffer 0
-		 * loads, and up to x4 load opcode merging. However, it leads to horrible
-		 * code reducing SIMD wave occupancy from 8 to 2 in many cases.
-		 *
-		 * Using s_buffer_load_dword (x1) seems to be the best option right now.
-		 *
-		 * LLVM 5.0 on SI doesn't insert a required s_nop between SALU setting
-		 * a descriptor and s_buffer_load_dword using it, so we can't expand
-		 * the pointer into a full descriptor like below. We have to use
-		 * s_load_dword instead. The only case when LLVM 5.0 would select
-		 * s_buffer_load_dword (that we have to prevent) is when we use use
-		 * a literal offset where we don't need bounds checking.
-		 */
-		if (ctx->screen->info.chip_class == SI && HAVE_LLVM < 0x0600 &&
-		    !reg->Register.Indirect) {
-			LLVMValueRef ptr =
-				LLVMGetParam(ctx->main_fn, ctx->param_const_and_shader_buffers);
-
-			addr = LLVMBuildLShr(ctx->ac.builder, addr, LLVMConstInt(ctx->i32, 2, 0), "");
-			LLVMValueRef result = ac_build_load_invariant(&ctx->ac, ptr, addr);
-			return bitcast(bld_base, type, result);
-		}
-
 		LLVMValueRef desc = load_const_buffer_desc_fast_path(ctx);
 		LLVMValueRef result = buffer_load_const(ctx, desc, addr);
 		return bitcast(bld_base, type, result);
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 4ae5b006593..0aefca22385 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -748,13 +748,6 @@ void si_nir_scan_shader(const struct nir_shader *nir,
 void
 si_lower_nir(struct si_shader_selector* sel)
 {
-	/* Disable const buffer fast path for old LLVM versions */
-	if (sel->screen->info.chip_class == SI && HAVE_LLVM < 0x0600 &&
-	    sel->info.const_buffers_declared == 1 &&
-	    sel->info.shader_buffers_declared == 0) {
-		sel->info.const_buffers_declared |= 0x2;
-	}
-
 	/* Adjust the driver location of inputs and outputs. The state tracker
 	 * interprets them as slots, while the ac/nir backend interprets them
 	 * as individual components.
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index c51d057967c..4c908745313 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -56,11 +56,9 @@ void si_llvm_emit_kill(struct ac_shader_abi *abi, LLVMValueRef visible)
 	LLVMBuilderRef builder = ctx->ac.builder;
 
 	if (ctx->shader->selector->force_correct_derivs_after_kill) {
-		/* LLVM 6.0 can kill immediately while maintaining WQM. */
-		if (HAVE_LLVM >= 0x0600) {
-			ac_build_kill_if_false(&ctx->ac,
-					       ac_build_wqm_vote(&ctx->ac, visible));
-		}
+		/* Kill immediately while maintaining WQM. */
+		ac_build_kill_if_false(&ctx->ac,
+				       ac_build_wqm_vote(&ctx->ac, visible));
 
 		LLVMValueRef mask = LLVMBuildLoad(builder, ctx->postponed_kill, "");
 		mask = LLVMBuildAnd(builder, mask, visible, "");