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-rw-r--r--src/gallium/drivers/r600/r600_hw_context.c3
-rw-r--r--src/gallium/drivers/radeon/r600_cs.h29
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.c2
-rw-r--r--src/gallium/drivers/radeon/radeon_winsys.h11
-rw-r--r--src/gallium/drivers/radeonsi/si_hw_context.c5
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_cs.c18
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_cs.c16
7 files changed, 32 insertions, 52 deletions
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 2ddea13cf65..113991ffbbe 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -37,7 +37,8 @@ void r600_need_cs_space(struct r600_context *ctx, unsigned num_dw,
if (radeon_emitted(ctx->b.dma.cs, 0))
ctx->b.dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
- if (!ctx->b.ws->cs_memory_below_limit(ctx->b.gfx.cs, ctx->b.vram, ctx->b.gtt)) {
+ if (!radeon_cs_memory_below_limit(ctx->b.screen, ctx->b.gfx.cs,
+ ctx->b.vram, ctx->b.gtt)) {
ctx->b.gtt = 0;
ctx->b.vram = 0;
ctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
diff --git a/src/gallium/drivers/radeon/r600_cs.h b/src/gallium/drivers/radeon/r600_cs.h
index 988774aac8f..e97769b293d 100644
--- a/src/gallium/drivers/radeon/r600_cs.h
+++ b/src/gallium/drivers/radeon/r600_cs.h
@@ -34,6 +34,29 @@
#include "r600d_common.h"
/**
+ * Return true if there is enough memory in VRAM and GTT for the buffers
+ * added so far.
+ *
+ * \param vram VRAM memory size not added to the buffer list yet
+ * \param gtt GTT memory size not added to the buffer list yet
+ */
+static inline bool
+radeon_cs_memory_below_limit(struct r600_common_screen *screen,
+ struct radeon_winsys_cs *cs,
+ uint64_t vram, uint64_t gtt)
+{
+ vram += cs->used_vram;
+ gtt += cs->used_gart;
+
+ /* Anything that goes above the VRAM size should go to GTT. */
+ if (vram > screen->info.vram_size)
+ gtt += vram - screen->info.vram_size;
+
+ /* Now we just need to check if we have enough GTT. */
+ return gtt < screen->info.gart_size * 0.7;
+}
+
+/**
* Add a buffer to the buffer list for the given command stream (CS).
*
* All buffers used by a CS must be added to the list. This tells the kernel
@@ -80,9 +103,9 @@ radeon_add_to_buffer_list_check_mem(struct r600_common_context *rctx,
bool check_mem)
{
if (check_mem &&
- !rctx->ws->cs_memory_below_limit(ring->cs,
- rctx->vram + rbo->vram_usage,
- rctx->gtt + rbo->gart_usage))
+ !radeon_cs_memory_below_limit(rctx->screen, ring->cs,
+ rctx->vram + rbo->vram_usage,
+ rctx->gtt + rbo->gart_usage))
ring->flush(rctx, RADEON_FLUSH_ASYNC, NULL);
return radeon_add_to_buffer_list(rctx, ring, rbo, usage, priority);
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index faa739051e5..7fd3fe08f63 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -166,7 +166,7 @@ void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw,
* is too large.
*/
if (!ctx->ws->cs_check_space(ctx->dma.cs, num_dw) ||
- !ctx->ws->cs_memory_below_limit(ctx->dma.cs, vram, gtt)) {
+ !radeon_cs_memory_below_limit(ctx->screen, ctx->dma.cs, vram, gtt)) {
ctx->dma.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
assert((num_dw + ctx->dma.cs->current.cdw) <= ctx->dma.cs->current.max_dw);
}
diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h
index 2dd4a39bab4..3be4738027a 100644
--- a/src/gallium/drivers/radeon/radeon_winsys.h
+++ b/src/gallium/drivers/radeon/radeon_winsys.h
@@ -708,17 +708,6 @@ struct radeon_winsys {
bool (*cs_check_space)(struct radeon_winsys_cs *cs, unsigned dw);
/**
- * Return true if there is enough memory in VRAM and GTT for the buffers
- * added so far.
- *
- * \param cs A command stream to validate.
- * \param vram VRAM memory size pending to be use
- * \param gtt GTT memory size pending to be use
- */
- bool (*cs_memory_below_limit)(struct radeon_winsys_cs *cs,
- uint64_t vram, uint64_t gtt);
-
- /**
* Return the buffer list.
*
* \param cs Command stream
diff --git a/src/gallium/drivers/radeonsi/si_hw_context.c b/src/gallium/drivers/radeonsi/si_hw_context.c
index 91c985f3675..829dd166b44 100644
--- a/src/gallium/drivers/radeonsi/si_hw_context.c
+++ b/src/gallium/drivers/radeonsi/si_hw_context.c
@@ -25,6 +25,7 @@
*/
#include "si_pipe.h"
+#include "radeon/r600_cs.h"
static unsigned si_descriptor_list_cs_space(unsigned count, unsigned element_size)
{
@@ -71,8 +72,8 @@ void si_need_cs_space(struct si_context *ctx)
* that have been added (cs_add_buffer) and two counters in the pipe
* driver for those that haven't been added yet.
*/
- if (unlikely(!ctx->b.ws->cs_memory_below_limit(ctx->b.gfx.cs,
- ctx->b.vram, ctx->b.gtt))) {
+ if (unlikely(!radeon_cs_memory_below_limit(ctx->b.screen, ctx->b.gfx.cs,
+ ctx->b.vram, ctx->b.gtt))) {
ctx->b.gtt = 0;
ctx->b.vram = 0;
ctx->b.gfx.flush(ctx, RADEON_FLUSH_ASYNC, NULL);
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index b3c5d6e2645..ab6bca89602 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -782,23 +782,6 @@ static bool amdgpu_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
return true;
}
-static bool amdgpu_cs_memory_below_limit(struct radeon_winsys_cs *rcs,
- uint64_t vram, uint64_t gtt)
-{
- struct amdgpu_cs *cs = amdgpu_cs(rcs);
- struct amdgpu_winsys *ws = cs->ctx->ws;
-
- vram += cs->main.base.used_vram;
- gtt += cs->main.base.used_gart;
-
- /* Anything that goes above the VRAM size should go to GTT. */
- if (vram > ws->info.vram_size)
- gtt += vram - ws->info.vram_size;
-
- /* Now we just need to check if we have enough GTT. */
- return gtt < ws->info.gart_size * 0.7;
-}
-
static unsigned amdgpu_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
struct radeon_bo_list_item *list)
{
@@ -1112,7 +1095,6 @@ void amdgpu_cs_init_functions(struct amdgpu_winsys *ws)
ws->base.cs_lookup_buffer = amdgpu_cs_lookup_buffer;
ws->base.cs_validate = amdgpu_cs_validate;
ws->base.cs_check_space = amdgpu_cs_check_space;
- ws->base.cs_memory_below_limit = amdgpu_cs_memory_below_limit;
ws->base.cs_get_buffer_list = amdgpu_cs_get_buffer_list;
ws->base.cs_flush = amdgpu_cs_flush;
ws->base.cs_is_buffer_referenced = amdgpu_bo_is_referenced;
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 15eeb40cb15..e06a01d5cac 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -389,21 +389,6 @@ static bool radeon_drm_cs_check_space(struct radeon_winsys_cs *rcs, unsigned dw)
return rcs->current.max_dw - rcs->current.cdw >= dw;
}
-static bool radeon_drm_cs_memory_below_limit(struct radeon_winsys_cs *rcs, uint64_t vram, uint64_t gtt)
-{
- struct radeon_drm_cs *cs = radeon_drm_cs(rcs);
-
- vram += cs->base.used_vram;
- gtt += cs->base.used_gart;
-
- /* Anything that goes above the VRAM size should go to GTT. */
- if (vram > cs->ws->info.vram_size)
- gtt += vram - cs->ws->info.vram_size;
-
- /* Now we just need to check if we have enough GTT. */
- return gtt < cs->ws->info.gart_size * 0.7;
-}
-
static unsigned radeon_drm_cs_get_buffer_list(struct radeon_winsys_cs *rcs,
struct radeon_bo_list_item *list)
{
@@ -676,7 +661,6 @@ void radeon_drm_cs_init_functions(struct radeon_drm_winsys *ws)
ws->base.cs_lookup_buffer = radeon_drm_cs_lookup_buffer;
ws->base.cs_validate = radeon_drm_cs_validate;
ws->base.cs_check_space = radeon_drm_cs_check_space;
- ws->base.cs_memory_below_limit = radeon_drm_cs_memory_below_limit;
ws->base.cs_get_buffer_list = radeon_drm_cs_get_buffer_list;
ws->base.cs_flush = radeon_drm_cs_flush;
ws->base.cs_is_buffer_referenced = radeon_bo_is_referenced;