6 files changed, 8 insertions, 41 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_context.c b/src/gallium/drivers/freedreno/a4xx/fd4_context.c
index 7d6365bbb6d..62cfda97ac3 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_context.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_context.c
@@ -43,8 +43,6 @@ fd4_context_destroy(struct pipe_context *pctx)
 {
 	struct fd4_context *fd4_ctx = fd4_context(fd_context(pctx));
 
-	util_dynarray_fini(&fd4_ctx->rbrc_patches);
-
 	fd_bo_del(fd4_ctx->vs_pvt_mem);
 	fd_bo_del(fd4_ctx->fs_pvt_mem);
 	fd_bo_del(fd4_ctx->vsc_size_mem);
@@ -127,8 +125,6 @@ fd4_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
 	if (!pctx)
 		return NULL;
 
-	util_dynarray_init(&fd4_ctx->rbrc_patches);
-
 	fd4_ctx->vs_pvt_mem = fd_bo_new(screen->dev, 0x2000,
 			DRM_FREEDRENO_GEM_TYPE_KMEM);
 
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_context.h b/src/gallium/drivers/freedreno/a4xx/fd4_context.h
index 0c1027d5804..8996de932b8 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_context.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_context.h
@@ -40,11 +40,6 @@
 struct fd4_context {
 	struct fd_context base;
 
-	/* Keep track of writes to RB_RENDER_CONTROL which need to be patched
-	 * once we know whether or not to use GMEM, and GMEM tile pitch.
-	 */
-	struct util_dynarray rbrc_patches;
-
 	struct fd_bo *vs_pvt_mem, *fs_pvt_mem;
 
 	/* This only needs to be 4 * num_of_pipes bytes (ie. 32 bytes).  We
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index e887abf709f..58ddf2aeebe 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -485,19 +485,6 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
 				A4XX_RB_RENDER_COMPONENTS_RT7(mrt_comp[7]));
 	}
 
-	if ((dirty & (FD_DIRTY_ZSA | FD_DIRTY_PROG)) && !emit->key.binning_pass) {
-		uint32_t val = fd4_zsa_stateobj(ctx->zsa)->rb_render_control;
-
-		/* I suppose if we needed to (which I don't *think* we need
-		 * to), we could emit this for binning pass too.  But we
-		 * would need to keep a different patch-list for binning
-		 * vs render pass.
-		 */
-
-		OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL, 1);
-		OUT_RINGP(ring, val, &fd4_context(ctx)->rbrc_patches);
-	}
-
 	if (dirty & (FD_DIRTY_ZSA | FD_DIRTY_FRAMEBUFFER)) {
 		struct fd4_zsa_stateobj *zsa = fd4_zsa_stateobj(ctx->zsa);
 		struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
index 221608127b4..bb740881037 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_gmem.c
@@ -502,18 +502,6 @@ patch_draws(struct fd_context *ctx, enum pc_di_vis_cull_mode vismode)
 	util_dynarray_resize(&ctx->draw_patches, 0);
 }
 
-static void
-patch_rbrc(struct fd_context *ctx, uint32_t val)
-{
-	struct fd4_context *fd4_ctx = fd4_context(ctx);
-	unsigned i;
-	for (i = 0; i < fd_patch_num_elements(&fd4_ctx->rbrc_patches); i++) {
-		struct fd_cs_patch *patch = fd_patch_element(&fd4_ctx->rbrc_patches, i);
-		*patch->cs = patch->val | val;
-	}
-	util_dynarray_resize(&fd4_ctx->rbrc_patches, 0);
-}
-
 /* for rendering directly to system memory: */
 static void
 fd4_emit_sysmem_prep(struct fd_context *ctx)
@@ -545,8 +533,10 @@ fd4_emit_sysmem_prep(struct fd_context *ctx)
 			A4XX_RB_MODE_CONTROL_HEIGHT(0) |
 			0x00c00000);  /* XXX */
 
+	OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL, 1);
+	OUT_RING(ring, 0x8);
+
 	patch_draws(ctx, IGNORE_VISIBILITY);
-	patch_rbrc(ctx, 0);  // XXX
 }
 
 static void
@@ -591,7 +581,6 @@ fd4_emit_tile_init(struct fd_context *ctx)
 {
 	struct fd_ringbuffer *ring = ctx->ring;
 	struct fd_gmem_stateobj *gmem = &ctx->gmem;
-	uint32_t rb_render_control;
 
 	fd4_emit_restore(ctx);
 
@@ -607,8 +596,8 @@ fd4_emit_tile_init(struct fd_context *ctx)
 	update_vsc_pipe(ctx);
 	patch_draws(ctx, IGNORE_VISIBILITY);
 
-	rb_render_control = 0; // XXX or BINNING_PASS.. but maybe we can emit only from gmem
-	patch_rbrc(ctx, rb_render_control);
+	OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL, 1);
+	OUT_RING(ring, 0x8);
 }
 
 /* before mem2gmem */
@@ -696,6 +685,9 @@ fd4_emit_tile_renderprep(struct fd_context *ctx, struct fd_tile *tile)
 			A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(y1));
 	OUT_RING(ring, A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(x2) |
 			A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(y2));
+
+	OUT_PKT0(ring, REG_A4XX_RB_RENDER_CONTROL, 1);
+	OUT_RING(ring, 0x8);
 }
 
 void
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c b/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c
index e14b617570d..a9c8d5a3d62 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_zsa.c
@@ -103,7 +103,5 @@ fd4_zsa_state_create(struct pipe_context *pctx,
 			A4XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
 	}
 
-	so->rb_render_control = 0x8;  /* XXX */
-
 	return so;
 }
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_zsa.h b/src/gallium/drivers/freedreno/a4xx/fd4_zsa.h
index 6a92a9b6785..3c46117a3fe 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_zsa.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_zsa.h
@@ -39,7 +39,6 @@ struct fd4_zsa_stateobj {
 	struct pipe_depth_stencil_alpha_state base;
 	uint32_t gras_alpha_control;
 	uint32_t rb_alpha_control;
-	uint32_t rb_render_control;
 	uint32_t rb_depth_control;
 	uint32_t rb_stencil_control;
 	uint32_t rb_stencil_control2;