diff options
Diffstat (limited to 'src/gallium')
| -rw-r--r-- | src/gallium/drivers/iris/iris_context.h | 8 | ||||
| -rw-r--r-- | src/gallium/drivers/iris/iris_query.c | 2 | ||||
| -rw-r--r-- | src/gallium/drivers/iris/iris_state.c | 16 |
3 files changed, 13 insertions, 13 deletions
diff --git a/src/gallium/drivers/iris/iris_context.h b/src/gallium/drivers/iris/iris_context.h index d3ccc920eb1..375d6002a78 100644 --- a/src/gallium/drivers/iris/iris_context.h +++ b/src/gallium/drivers/iris/iris_context.h @@ -327,10 +327,10 @@ struct iris_vtable { void (*upload_compute_state)(struct iris_context *ice, struct iris_batch *batch, const struct pipe_grid_info *grid); - void (*load_register_reg32)(struct iris_batch *batch, uint32_t src, - uint32_t dst); - void (*load_register_reg64)(struct iris_batch *batch, uint32_t src, - uint32_t dst); + void (*load_register_reg32)(struct iris_batch *batch, uint32_t dst, + uint32_t src); + void (*load_register_reg64)(struct iris_batch *batch, uint32_t dst, + uint32_t src); void (*load_register_imm32)(struct iris_batch *batch, uint32_t reg, uint32_t val); void (*load_register_imm64)(struct iris_batch *batch, uint32_t reg, diff --git a/src/gallium/drivers/iris/iris_query.c b/src/gallium/drivers/iris/iris_query.c index 25eaacd22db..a50d919d366 100644 --- a/src/gallium/drivers/iris/iris_query.c +++ b/src/gallium/drivers/iris/iris_query.c @@ -778,7 +778,7 @@ set_predicate_for_result(struct iris_context *ice, case PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE: overflow_result_to_gpr0(ice, q); - ice->vtbl.load_register_reg64(batch, CS_GPR(0), MI_PREDICATE_SRC0); + ice->vtbl.load_register_reg64(batch, MI_PREDICATE_SRC0, CS_GPR(0)); ice->vtbl.load_register_imm64(batch, MI_PREDICATE_SRC1, 0ull); break; default: diff --git a/src/gallium/drivers/iris/iris_state.c b/src/gallium/drivers/iris/iris_state.c index 540f0dfa96d..ef133c59740 100644 --- a/src/gallium/drivers/iris/iris_state.c +++ b/src/gallium/drivers/iris/iris_state.c @@ -486,7 +486,7 @@ _iris_emit_lri(struct iris_batch *batch, uint32_t reg, uint32_t val) #define iris_emit_lri(b, r, v) _iris_emit_lri(b, GENX(r##_num), v) static void -_iris_emit_lrr(struct iris_batch *batch, uint32_t src, uint32_t dst) +_iris_emit_lrr(struct iris_batch *batch, uint32_t dst, uint32_t src) { iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_REG), lrr) { lrr.SourceRegisterAddress = src; @@ -4834,18 +4834,18 @@ iris_destroy_state(struct iris_context *ice) /* ------------------------------------------------------------------- */ static void -iris_load_register_reg32(struct iris_batch *batch, uint32_t src, - uint32_t dst) +iris_load_register_reg32(struct iris_batch *batch, uint32_t dst, + uint32_t src) { - _iris_emit_lrr(batch, src, dst); + _iris_emit_lrr(batch, dst, src); } static void -iris_load_register_reg64(struct iris_batch *batch, uint32_t src, - uint32_t dst) +iris_load_register_reg64(struct iris_batch *batch, uint32_t dst, + uint32_t src) { - _iris_emit_lrr(batch, src, dst); - _iris_emit_lrr(batch, src + 4, dst + 4); + _iris_emit_lrr(batch, dst, src); + _iris_emit_lrr(batch, dst + 4, src + 4); } static void |