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-rw-r--r--src/gallium/drivers/virgl/virgl_context.c9
-rw-r--r--src/gallium/drivers/virgl/virgl_encode.c8
-rw-r--r--src/gallium/drivers/virgl/virgl_encode.h2
-rw-r--r--src/gallium/drivers/virgl/virgl_hw.h1
-rw-r--r--src/gallium/drivers/virgl/virgl_protocol.h5
-rw-r--r--src/gallium/drivers/virgl/virgl_screen.c2
6 files changed, 24 insertions, 3 deletions
diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index 03c0fd7cd50..dc1dd2d3c29 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -805,9 +805,14 @@ static void virgl_set_sampler_views(struct pipe_context *ctx,
}
static void
-virgl_texture_barrier(struct pipe_context *pctx, unsigned flags)
+virgl_texture_barrier(struct pipe_context *ctx, unsigned flags)
{
- /* stub */
+ struct virgl_context *vctx = virgl_context(ctx);
+ struct virgl_screen *rs = virgl_screen(ctx->screen);
+
+ if (!(rs->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER))
+ return;
+ virgl_encode_texture_barrier(vctx, flags);
}
static void virgl_destroy_sampler_view(struct pipe_context *ctx,
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index 670c5fe6c3d..190c338f458 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -1009,3 +1009,11 @@ int virgl_encode_launch_grid(struct virgl_context *ctx,
virgl_encoder_write_dword(ctx->cbuf, grid_info->indirect_offset);
return 0;
}
+
+int virgl_encode_texture_barrier(struct virgl_context *ctx,
+ unsigned flags)
+{
+ virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_TEXTURE_BARRIER, 0, 1));
+ virgl_encoder_write_dword(ctx->cbuf, flags);
+ return 0;
+}
diff --git a/src/gallium/drivers/virgl/virgl_encode.h b/src/gallium/drivers/virgl/virgl_encode.h
index c982eb954f3..749cd330120 100644
--- a/src/gallium/drivers/virgl/virgl_encode.h
+++ b/src/gallium/drivers/virgl/virgl_encode.h
@@ -272,4 +272,6 @@ int virgl_encode_memory_barrier(struct virgl_context *ctx,
unsigned flags);
int virgl_encode_launch_grid(struct virgl_context *ctx,
const struct pipe_grid_info *grid_info);
+int virgl_encode_texture_barrier(struct virgl_context *ctx,
+ unsigned flags);
#endif
diff --git a/src/gallium/drivers/virgl/virgl_hw.h b/src/gallium/drivers/virgl/virgl_hw.h
index 1df9d0e77d1..b56f554b001 100644
--- a/src/gallium/drivers/virgl/virgl_hw.h
+++ b/src/gallium/drivers/virgl/virgl_hw.h
@@ -229,6 +229,7 @@ enum virgl_formats {
#define VIRGL_CAP_ROBUST_BUFFER_ACCESS (1 << 9)
#define VIRGL_CAP_TGSI_FBFETCH (1 << 10)
#define VIRGL_CAP_SHADER_CLOCK (1 << 11)
+#define VIRGL_CAP_TEXTURE_BARRIER (1 << 12)
/* virgl bind flags - these are compatible with mesa 10.5 gallium.
* but are fixed, no other should be passed to virgl either.
diff --git a/src/gallium/drivers/virgl/virgl_protocol.h b/src/gallium/drivers/virgl/virgl_protocol.h
index 982bc5c8c2b..0a41c0174f2 100644
--- a/src/gallium/drivers/virgl/virgl_protocol.h
+++ b/src/gallium/drivers/virgl/virgl_protocol.h
@@ -91,6 +91,7 @@ enum virgl_context_cmd {
VIRGL_CCMD_MEMORY_BARRIER,
VIRGL_CCMD_LAUNCH_GRID,
VIRGL_CCMD_SET_FRAMEBUFFER_STATE_NO_ATTACH,
+ VIRGL_CCMD_TEXTURE_BARRIER,
};
/*
@@ -539,4 +540,8 @@ enum virgl_context_cmd {
#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_LAYERS(x) (x & 0xffff)
#define VIRGL_SET_FRAMEBUFFER_STATE_NO_ATTACH_SAMPLES(x) ((x >> 16) & 0xff)
+/* texture barrier */
+#define VIRGL_TEXTURE_BARRIER_SIZE 1
+#define VIRGL_TEXTURE_BARRIER_FLAGS 1
+
#endif
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index 421fde5249d..87ce3b7355d 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -124,7 +124,7 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_CONDITIONAL_RENDER:
return vscreen->caps.caps.v1.bset.conditional_render;
case PIPE_CAP_TEXTURE_BARRIER:
- return 0;
+ return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TEXTURE_BARRIER;
case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
return 1;
case PIPE_CAP_FRAGMENT_COLOR_CLAMPED: