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-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_blend.c4
-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_blend.h1
-rw-r--r--src/gallium/drivers/freedreno/a4xx/fd4_emit.c7
3 files changed, 11 insertions, 1 deletions
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_blend.c b/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
index f569e9313c3..bf2254a8ae0 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_blend.c
@@ -110,11 +110,13 @@ fd4_blend_state_create(struct pipe_context *pctx,
0xc00 | /* XXX ROP_CODE ?? */
A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(rt->colormask);
- if (rt->blend_enable)
+ if (rt->blend_enable) {
so->rb_mrt[i].control |=
A4XX_RB_MRT_CONTROL_READ_DEST_ENABLE |
A4XX_RB_MRT_CONTROL_BLEND |
A4XX_RB_MRT_CONTROL_BLEND2;
+ so->rb_fs_output |= A4XX_RB_FS_OUTPUT_ENABLE_BLEND;
+ }
if (reads_dest)
so->rb_mrt[i].control |= A4XX_RB_MRT_CONTROL_READ_DEST_ENABLE;
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_blend.h b/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
index 68fcf23ff5c..33641da5e2c 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_blend.h
@@ -39,6 +39,7 @@ struct fd4_blend_stateobj {
uint32_t buf_info;
uint32_t blend_control;
} rb_mrt[8];
+ uint32_t rb_fs_output;
};
static INLINE struct fd4_blend_stateobj *
diff --git a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
index 44a824ab164..56ac0d109c2 100644
--- a/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
+++ b/src/gallium/drivers/freedreno/a4xx/fd4_emit.c
@@ -367,6 +367,9 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_PKT0(ring, REG_A4XX_GRAS_ALPHA_CONTROL, 1);
OUT_RING(ring, zsa->gras_alpha_control);
+ OUT_PKT0(ring, REG_A4XX_RB_ALPHA_CONTROL, 1);
+ OUT_RING(ring, zsa->rb_alpha_control);
+
OUT_PKT0(ring, REG_A4XX_RB_STENCIL_CONTROL, 2);
OUT_RING(ring, zsa->rb_stencil_control);
OUT_RING(ring, zsa->rb_stencil_control2);
@@ -486,6 +489,10 @@ fd4_emit_state(struct fd_context *ctx, struct fd_ringbuffer *ring,
OUT_PKT0(ring, REG_A4XX_RB_MRT_BLEND_CONTROL(i), 1);
OUT_RING(ring, blend->rb_mrt[i].blend_control);
}
+
+ OUT_PKT0(ring, REG_A4XX_RB_FS_OUTPUT, 1);
+ OUT_RING(ring, blend->rb_fs_output |
+ A4XX_RB_FS_OUTPUT_SAMPLE_MASK(0xffff));
}
if (dirty & FD_DIRTY_VERTTEX) {