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-rw-r--r--src/gallium/drivers/r600/r600_pipe.c2
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.c20
-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.h25
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c5
4 files changed, 17 insertions, 35 deletions
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 023f1b4bd14..9844add6053 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -666,7 +666,7 @@ struct pipe_screen *r600_screen_create(struct radeon_winsys *ws,
if (debug_get_bool_option("R600_DEBUG_COMPUTE", FALSE))
rscreen->b.debug_flags |= DBG_COMPUTE;
if (debug_get_bool_option("R600_DUMP_SHADERS", FALSE))
- rscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS | DBG_TCS | DBG_TES;
+ rscreen->b.debug_flags |= DBG_ALL_SHADERS | DBG_FS;
if (!debug_get_bool_option("R600_HYPERZ", TRUE))
rscreen->b.debug_flags |= DBG_NO_HYPERZ;
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 7c12565d162..99172c6c55f 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -899,8 +899,7 @@ static const char *r600_get_family_name(const struct r600_common_screen *rscreen
static void r600_disk_cache_create(struct r600_common_screen *rscreen)
{
/* Don't use the cache if shader dumping is enabled. */
- if (rscreen->debug_flags &
- (DBG_FS | DBG_VS | DBG_TCS | DBG_TES | DBG_GS | DBG_PS | DBG_CS))
+ if (rscreen->debug_flags & DBG_ALL_SHADERS)
return;
uint32_t mesa_timestamp;
@@ -1535,22 +1534,7 @@ void r600_destroy_common_screen(struct r600_common_screen *rscreen)
bool r600_can_dump_shader(struct r600_common_screen *rscreen,
unsigned processor)
{
- switch (processor) {
- case PIPE_SHADER_VERTEX:
- return (rscreen->debug_flags & DBG_VS) != 0;
- case PIPE_SHADER_TESS_CTRL:
- return (rscreen->debug_flags & DBG_TCS) != 0;
- case PIPE_SHADER_TESS_EVAL:
- return (rscreen->debug_flags & DBG_TES) != 0;
- case PIPE_SHADER_GEOMETRY:
- return (rscreen->debug_flags & DBG_GS) != 0;
- case PIPE_SHADER_FRAGMENT:
- return (rscreen->debug_flags & DBG_PS) != 0;
- case PIPE_SHADER_COMPUTE:
- return (rscreen->debug_flags & DBG_CS) != 0;
- default:
- return false;
- }
+ return rscreen->debug_flags & (1 << processor);
}
bool r600_extra_shader_checks(struct r600_common_screen *rscreen, unsigned processor)
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h
index 8c70e91ae03..9f9b42bbece 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.h
+++ b/src/gallium/drivers/radeon/r600_pipe_common.h
@@ -70,20 +70,19 @@ struct u_log_context;
#define R600_NOT_QUERY 0xffffffff
/* Debug flags. */
-/* logging and features */
-#define DBG_TEX (1 << 0)
-#define DBG_NIR (1 << 1)
-#define DBG_COMPUTE (1 << 2)
-#define DBG_VM (1 << 3)
+#define DBG_VS (1 << PIPE_SHADER_VERTEX)
+#define DBG_PS (1 << PIPE_SHADER_FRAGMENT)
+#define DBG_GS (1 << PIPE_SHADER_GEOMETRY)
+#define DBG_TCS (1 << PIPE_SHADER_TESS_CTRL)
+#define DBG_TES (1 << PIPE_SHADER_TESS_EVAL)
+#define DBG_CS (1 << PIPE_SHADER_COMPUTE)
+#define DBG_ALL_SHADERS (DBG_FS - 1)
+#define DBG_FS (1 << 6) /* fetch shader */
+#define DBG_TEX (1 << 7)
+#define DBG_NIR (1 << 8)
+#define DBG_COMPUTE (1 << 9)
/* gap */
-/* shader logging */
-#define DBG_FS (1 << 5)
-#define DBG_VS (1 << 6)
-#define DBG_GS (1 << 7)
-#define DBG_PS (1 << 8)
-#define DBG_CS (1 << 9)
-#define DBG_TCS (1 << 10)
-#define DBG_TES (1 << 11)
+#define DBG_VM (1 << 11)
#define DBG_NO_IR (1 << 12)
#define DBG_NO_TGSI (1 << 13)
#define DBG_NO_ASM (1 << 14)
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 98d65329e3e..2a3af6f65a8 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -371,8 +371,7 @@ static struct pipe_context *si_pipe_create_context(struct pipe_screen *screen,
/* When shaders are logged to stderr, asynchronous compilation is
* disabled too. */
- if (sscreen->b.debug_flags & (DBG_VS | DBG_TCS | DBG_TES | DBG_GS |
- DBG_PS | DBG_CS))
+ if (sscreen->b.debug_flags & DBG_ALL_SHADERS)
return ctx;
return threaded_context_create(ctx, &sscreen->b.pool_transfers,
@@ -1086,7 +1085,7 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws,
sscreen->b.barrier_flags.compute_to_L2 = SI_CONTEXT_CS_PARTIAL_FLUSH;
if (debug_get_bool_option("RADEON_DUMP_SHADERS", false))
- sscreen->b.debug_flags |= DBG_FS | DBG_VS | DBG_GS | DBG_PS | DBG_CS;
+ sscreen->b.debug_flags |= DBG_ALL_SHADERS;
for (i = 0; i < num_compiler_threads; i++)
sscreen->tm[i] = si_create_llvm_target_machine(sscreen);