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-rw-r--r--src/gallium/drivers/r600/evergreen_compute.c21
-rw-r--r--src/gallium/drivers/r600/evergreen_state.c44
-rw-r--r--src/gallium/drivers/r600/r600_hw_context.c4
-rw-r--r--src/gallium/drivers/r600/r600_pipe.c3
-rw-r--r--src/gallium/drivers/r600/r600_pipe.h1
-rw-r--r--src/gallium/drivers/r600/r600_state_common.c11
6 files changed, 16 insertions, 68 deletions
diff --git a/src/gallium/drivers/r600/evergreen_compute.c b/src/gallium/drivers/r600/evergreen_compute.c
index 997e5f0e383..2a1b2519ec7 100644
--- a/src/gallium/drivers/r600/evergreen_compute.c
+++ b/src/gallium/drivers/r600/evergreen_compute.c
@@ -447,24 +447,15 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C60_CB_COLOR0_BASE */
radeon_emit(cs, reloc);
- if (!ctx->keep_tiling_flags) {
- radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C70_CB_COLOR0_INFO */
- radeon_emit(cs, reloc);
- }
-
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */
radeon_emit(cs, reloc);
}
- if (ctx->keep_tiling_flags) {
- for (; i < 8 ; i++) {
- radeon_compute_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
- S_028C70_FORMAT(V_028C70_COLOR_INVALID));
- }
- for (; i < 12; i++) {
- radeon_compute_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C,
- S_028C70_FORMAT(V_028C70_COLOR_INVALID));
- }
- }
+ for (; i < 8 ; i++)
+ radeon_compute_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
+ S_028C70_FORMAT(V_028C70_COLOR_INVALID));
+ for (; i < 12; i++)
+ radeon_compute_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C,
+ S_028C70_FORMAT(V_028C70_COLOR_INVALID));
/* Set CB_TARGET_MASK XXX: Use cb_misc_state */
radeon_compute_set_context_reg(cs, R_028238_CB_TARGET_MASK,
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 61d32c06671..a12638a5bdb 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1466,15 +1466,13 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
/* Colorbuffers. */
rctx->framebuffer.atom.num_dw += state->nr_cbufs * 23;
- if (rctx->keep_tiling_flags)
- rctx->framebuffer.atom.num_dw += state->nr_cbufs * 2;
+ rctx->framebuffer.atom.num_dw += state->nr_cbufs * 2;
rctx->framebuffer.atom.num_dw += (12 - state->nr_cbufs) * 3;
/* ZS buffer. */
if (state->zsbuf) {
rctx->framebuffer.atom.num_dw += 24;
- if (rctx->keep_tiling_flags)
- rctx->framebuffer.atom.num_dw += 2;
+ rctx->framebuffer.atom.num_dw += 2;
} else if (rctx->screen->b.info.drm_minor >= 18) {
rctx->framebuffer.atom.num_dw += 4;
}
@@ -1656,11 +1654,6 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C60_CB_COLOR0_BASE */
radeon_emit(cs, reloc);
- if (!rctx->keep_tiling_flags) {
- radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C70_CB_COLOR0_INFO */
- radeon_emit(cs, reloc);
- }
-
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */
radeon_emit(cs, reloc);
@@ -1674,27 +1667,12 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
if (i == 1 && state->cbufs[0]) {
radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + 1 * 0x3C,
cb->cb_color_info | tex->cb_color_info);
-
- if (!rctx->keep_tiling_flags) {
- unsigned reloc = radeon_add_to_buffer_list(&rctx->b,
- &rctx->b.gfx,
- (struct r600_resource*)state->cbufs[0]->texture,
- RADEON_USAGE_READWRITE,
- RADEON_PRIO_COLOR_BUFFER);
-
- radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C70_CB_COLOR0_INFO */
- radeon_emit(cs, reloc);
- }
i++;
}
- if (rctx->keep_tiling_flags) {
- for (; i < 8 ; i++) {
- radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C, 0);
- }
- for (; i < 12; i++) {
- radeon_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C, 0);
- }
- }
+ for (; i < 8 ; i++)
+ radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C, 0);
+ for (; i < 12; i++)
+ radeon_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C, 0);
/* ZS buffer. */
if (state->zsbuf) {
@@ -1721,11 +1699,6 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
radeon_emit(cs, zb->db_depth_size); /* R_028058_DB_DEPTH_SIZE */
radeon_emit(cs, zb->db_depth_slice); /* R_02805C_DB_DEPTH_SLICE */
- if (!rctx->keep_tiling_flags) {
- radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028040_DB_Z_INFO */
- radeon_emit(cs, reloc);
- }
-
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028048_DB_Z_READ_BASE */
radeon_emit(cs, reloc);
@@ -3680,8 +3653,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
*/
if (rctx->b.chip_class == EVERGREEN) {
r600_init_atom(rctx, &rctx->config_state.atom, id++, evergreen_emit_config_state, 11);
- if (rctx->screen->b.info.drm_minor >= 7)
- rctx->config_state.dyn_gpr_enabled = true;
+ rctx->config_state.dyn_gpr_enabled = true;
}
r600_init_atom(rctx, &rctx->framebuffer.atom, id++, evergreen_emit_framebuffer_state, 0);
/* shader const */
@@ -3933,7 +3905,7 @@ bool evergreen_adjust_gprs(struct r600_context *rctx)
max_gprs += def_num_clause_temp_gprs * 2;
/* if we have no TESS and dyn gpr is enabled then do nothing. */
- if (!rctx->hw_shader_stages[EG_HW_STAGE_HS].shader || rctx->screen->b.info.drm_minor < 7) {
+ if (!rctx->hw_shader_stages[EG_HW_STAGE_HS].shader) {
if (rctx->config_state.dyn_gpr_enabled)
return true;
diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c
index 90b99e8a275..4951297df42 100644
--- a/src/gallium/drivers/r600/r600_hw_context.c
+++ b/src/gallium/drivers/r600/r600_hw_context.c
@@ -270,9 +270,7 @@ void r600_context_gfx_flush(void *context, unsigned flags,
}
/* force to keep tiling flags */
- if (ctx->keep_tiling_flags) {
- flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
- }
+ flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
/* Flush the CS. */
ctx->b.ws->cs_flush(cs, flags, fence, ctx->screen->b.cs_count++);
diff --git a/src/gallium/drivers/r600/r600_pipe.c b/src/gallium/drivers/r600/r600_pipe.c
index 7fb4108a188..5a6ce71414c 100644
--- a/src/gallium/drivers/r600/r600_pipe.c
+++ b/src/gallium/drivers/r600/r600_pipe.c
@@ -136,7 +136,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
goto fail;
rctx->screen = rscreen;
- rctx->keep_tiling_flags = rscreen->b.info.drm_minor >= 12;
r600_init_blit_functions(rctx);
@@ -409,7 +408,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 12;
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
/* textures support 8192, but layered rendering supports 2048 */
- return rscreen->b.info.drm_minor >= 9 ? 2048 : 0;
+ return 2048;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:
diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h
index 0e4dd16525b..f8a20398355 100644
--- a/src/gallium/drivers/r600/r600_pipe.h
+++ b/src/gallium/drivers/r600/r600_pipe.h
@@ -442,7 +442,6 @@ struct r600_context {
/* Hardware info. */
boolean has_vertex_cache;
- boolean keep_tiling_flags;
unsigned default_gprs[EG_NUM_HW_STAGES];
unsigned current_gprs[EG_NUM_HW_STAGES];
unsigned r6xx_num_clause_temp_gprs;
diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c
index b231d1e19b0..aa3a085c6d2 100644
--- a/src/gallium/drivers/r600/r600_state_common.c
+++ b/src/gallium/drivers/r600/r600_state_common.c
@@ -2235,7 +2235,6 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
uint32_t result = 0, word4 = 0, yuv_format = 0;
const struct util_format_description *desc;
boolean uniform = TRUE;
- bool enable_s3tc = rscreen->b.info.drm_minor >= 9;
bool is_srgb_valid = FALSE;
const unsigned char swizzle_xxxx[4] = {0, 0, 0, 0};
const unsigned char swizzle_yyyy[4] = {1, 1, 1, 1};
@@ -2330,9 +2329,6 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
}
if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
- if (!enable_s3tc)
- goto out_unknown;
-
switch (format) {
case PIPE_FORMAT_RGTC1_SNORM:
case PIPE_FORMAT_LATC1_SNORM:
@@ -2354,10 +2350,6 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
}
if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
-
- if (!enable_s3tc)
- goto out_unknown;
-
if (!util_format_s3tc_enabled) {
goto out_unknown;
}
@@ -2386,9 +2378,6 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
}
if (desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
- if (!enable_s3tc)
- goto out_unknown;
-
if (rscreen->b.chip_class < EVERGREEN)
goto out_unknown;
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-23 01:10:33 +0000