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-rw-r--r--src/gallium/drivers/r600/evergreen_state.c8
-rw-r--r--src/gallium/drivers/r600/evergreend.h1
-rw-r--r--src/gallium/drivers/r600/r600_shader.c8
-rw-r--r--src/gallium/drivers/r600/r600d.h2
-rw-r--r--src/gallium/winsys/r600/drm/evergreen_hw_context.c21
-rw-r--r--src/gallium/winsys/r600/drm/r600_hw_context.c21
6 files changed, 61 insertions, 0 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 4fa94e31e71..70799f6378e 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1593,6 +1593,10 @@ void evergreen_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shader
S_02880C_KILL_ENABLE(1),
S_02880C_KILL_ENABLE(1), NULL);
}
+
+ r600_pipe_state_add_reg(rstate,
+ R_03A200_SQ_LOOP_CONST_0, 0x01000FFF,
+ 0xFFFFFFFF, NULL);
}
void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader *shader)
@@ -1640,6 +1644,10 @@ void evergreen_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shader
r600_pipe_state_add_reg(rstate,
R_0288A4_SQ_PGM_START_FS,
0x00000000, 0xFFFFFFFF, shader->bo);
+
+ r600_pipe_state_add_reg(rstate,
+ R_03A200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF,
+ 0xFFFFFFFF, NULL);
}
void *evergreen_create_db_flush_dsa(struct r600_pipe_context *rctx)
diff --git a/src/gallium/drivers/r600/evergreend.h b/src/gallium/drivers/r600/evergreend.h
index e265348a19c..9971dded782 100644
--- a/src/gallium/drivers/r600/evergreend.h
+++ b/src/gallium/drivers/r600/evergreend.h
@@ -1910,4 +1910,5 @@
#define R_03CFF0_SQ_VTX_BASE_VTX_LOC 0x03CFF0
#define R_03CFF4_SQ_VTX_START_INST_LOC 0x03CFF4
+#define R_03A200_SQ_LOOP_CONST_0 0x3A200
#endif
diff --git a/src/gallium/drivers/r600/r600_shader.c b/src/gallium/drivers/r600/r600_shader.c
index 66cc035e7d9..41c01d4a7b3 100644
--- a/src/gallium/drivers/r600/r600_shader.c
+++ b/src/gallium/drivers/r600/r600_shader.c
@@ -81,6 +81,11 @@ static void r600_pipe_shader_vs(struct pipe_context *ctx, struct r600_pipe_shade
r600_pipe_state_add_reg(rstate,
R_028894_SQ_PGM_START_FS,
0x00000000, 0xFFFFFFFF, shader->bo);
+
+ r600_pipe_state_add_reg(rstate,
+ R_03E200_SQ_LOOP_CONST_0 + (32 * 4), 0x01000FFF,
+ 0xFFFFFFFF, NULL);
+
}
int r600_find_vs_semantic_index(struct r600_shader *vs,
@@ -182,6 +187,9 @@ static void r600_pipe_shader_ps(struct pipe_context *ctx, struct r600_pipe_shade
S_02880C_KILL_ENABLE(1),
S_02880C_KILL_ENABLE(1), NULL);
}
+ r600_pipe_state_add_reg(rstate,
+ R_03E200_SQ_LOOP_CONST_0, 0x01000FFF,
+ 0xFFFFFFFF, NULL);
}
static int r600_pipe_shader(struct pipe_context *ctx, struct r600_pipe_shader *shader)
diff --git a/src/gallium/drivers/r600/r600d.h b/src/gallium/drivers/r600/r600d.h
index 3d1c5dbfd87..a96d2ce26c1 100644
--- a/src/gallium/drivers/r600/r600d.h
+++ b/src/gallium/drivers/r600/r600d.h
@@ -3497,6 +3497,8 @@
#define R_03CFF0_SQ_VTX_BASE_VTX_LOC 0x03CFF0
#define R_03CFF4_SQ_VTX_START_INST_LOC 0x03CFF4
+#define R_03E200_SQ_LOOP_CONST_0 0x3E200
+
#define SQ_TEX_INST_LD 0x03
#define SQ_TEX_INST_GET_GRADIENTS_H 0x7
#define SQ_TEX_INST_GET_GRADIENTS_V 0x8
diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
index 129f571a04f..c3569e60e88 100644
--- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c
+++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c
@@ -493,6 +493,22 @@ static int evergreen_state_sampler_border_init(struct r600_context *ctx, u32 off
return 0;
}
+static int evergreen_loop_const_init(struct r600_context *ctx, u32 offset)
+{
+ unsigned nreg = 32;
+ struct r600_reg r600_loop_consts[32];
+ int i;
+
+ for (i = 0; i < nreg; i++) {
+ r600_loop_consts[i].opcode = PKT3_SET_LOOP_CONST;
+ r600_loop_consts[i].offset_base = EVERGREEN_LOOP_CONST_OFFSET;
+ r600_loop_consts[i].offset = EVERGREEN_LOOP_CONST_OFFSET + ((offset + i) * 4);
+ r600_loop_consts[i].need_bo = 0;
+ r600_loop_consts[i].flush_flags = 0;
+ }
+ return r600_context_add_block(ctx, r600_loop_consts, nreg);
+}
+
int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon)
{
int r;
@@ -566,6 +582,11 @@ int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon)
goto out_err;
}
+ /* PS loop const */
+ evergreen_loop_const_init(ctx, 0);
+ /* VS loop const */
+ evergreen_loop_const_init(ctx, 32);
+
/* setup block table */
ctx->blocks = calloc(ctx->nblocks, sizeof(void*));
for (int i = 0, c = 0; i < 256; i++) {
diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c
index 4d7547c9758..2ca5a45e03d 100644
--- a/src/gallium/winsys/r600/drm/r600_hw_context.c
+++ b/src/gallium/winsys/r600/drm/r600_hw_context.c
@@ -542,6 +542,22 @@ static int r600_state_sampler_border_init(struct r600_context *ctx, u32 offset)
return r600_context_add_block(ctx, r600_shader_sampler_border, nreg);
}
+static int r600_loop_const_init(struct r600_context *ctx, u32 offset)
+{
+ unsigned nreg = 32;
+ struct r600_reg r600_loop_consts[32];
+ int i;
+
+ for (i = 0; i < nreg; i++) {
+ r600_loop_consts[i].opcode = PKT3_SET_LOOP_CONST;
+ r600_loop_consts[i].offset_base = R600_LOOP_CONST_OFFSET;
+ r600_loop_consts[i].offset = R600_LOOP_CONST_OFFSET + ((offset + i) * 4);
+ r600_loop_consts[i].need_bo = 0;
+ r600_loop_consts[i].flush_flags = 0;
+ }
+ return r600_context_add_block(ctx, r600_loop_consts, nreg);
+}
+
/* initialize */
void r600_context_fini(struct r600_context *ctx)
{
@@ -639,6 +655,11 @@ int r600_context_init(struct r600_context *ctx, struct radeon *radeon)
goto out_err;
}
+ /* PS loop const */
+ r600_loop_const_init(ctx, 0);
+ /* VS loop const */
+ r600_loop_const_init(ctx, 32);
+
/* setup block table */
ctx->blocks = calloc(ctx->nblocks, sizeof(void*));
for (int i = 0, c = 0; i < 256; i++) {