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-rw-r--r--src/gallium/drivers/nouveau/nouveau_buffer.c5
-rw-r--r--src/gallium/drivers/nouveau/nouveau_buffer.h25
-rw-r--r--src/gallium/drivers/nv50/nv50_vbo.c3
-rw-r--r--src/gallium/drivers/nvc0/nvc0_vbo.c3
4 files changed, 0 insertions, 36 deletions
diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.c b/src/gallium/drivers/nouveau/nouveau_buffer.c
index f822625af90..f3cef8c288f 100644
--- a/src/gallium/drivers/nouveau/nouveau_buffer.c
+++ b/src/gallium/drivers/nouveau/nouveau_buffer.c
@@ -200,9 +200,6 @@ nouveau_buffer_transfer_destroy(struct pipe_context *pipe,
struct nouveau_context *nv = nouveau_context(pipe);
if (xfr->base.usage & PIPE_TRANSFER_WRITE) {
- /* writing is worse */
- nouveau_buffer_adjust_score(nv, buf, -5000);
-
if (buf->domain == NOUVEAU_BO_VRAM) {
nouveau_buffer_upload(nv, buf, transfer->box.x, transfer->box.width);
}
@@ -257,8 +254,6 @@ nouveau_buffer_transfer_map(struct pipe_context *pipe,
uint32_t offset = xfr->base.box.x;
uint32_t flags;
- nouveau_buffer_adjust_score(nouveau_context(pipe), buf, -250);
-
if (buf->domain != NOUVEAU_BO_GART)
return buf->data + offset;
diff --git a/src/gallium/drivers/nouveau/nouveau_buffer.h b/src/gallium/drivers/nouveau/nouveau_buffer.h
index 46e3554bdf7..c0a781c6fd3 100644
--- a/src/gallium/drivers/nouveau/nouveau_buffer.h
+++ b/src/gallium/drivers/nouveau/nouveau_buffer.h
@@ -8,10 +8,6 @@ struct pipe_resource;
struct nouveau_context;
struct nouveau_bo;
-#define NOUVEAU_BUFFER_SCORE_MIN -25000
-#define NOUVEAU_BUFFER_SCORE_MAX 25000
-#define NOUVEAU_BUFFER_SCORE_VRAM_THRESHOLD 20000
-
/* DIRTY: buffer was (or will be after the next flush) written to by GPU and
* resource->data has not been updated to reflect modified VRAM contents
*
@@ -39,8 +35,6 @@ struct nv04_resource {
uint8_t status;
uint8_t domain;
- int16_t score; /* low if mapped very often, if high can move to VRAM */
-
struct nouveau_fence *fence;
struct nouveau_fence *fence_wr;
@@ -58,23 +52,6 @@ boolean
nouveau_buffer_migrate(struct nouveau_context *,
struct nv04_resource *, unsigned domain);
-static INLINE void
-nouveau_buffer_adjust_score(struct nouveau_context *pipe,
- struct nv04_resource *res, int16_t score)
-{
- if (score < 0) {
- if (res->score > NOUVEAU_BUFFER_SCORE_MIN)
- res->score += score;
- } else
- if (score > 0){
- if (res->score < NOUVEAU_BUFFER_SCORE_MAX)
- res->score += score;
- if (res->domain == NOUVEAU_BO_GART &&
- res->score > NOUVEAU_BUFFER_SCORE_VRAM_THRESHOLD)
- nouveau_buffer_migrate(pipe, res, NOUVEAU_BO_VRAM);
- }
-}
-
/* XXX: wait for fence (atm only using this for vertex push) */
static INLINE void *
nouveau_resource_map_offset(struct nouveau_context *pipe,
@@ -83,8 +60,6 @@ nouveau_resource_map_offset(struct nouveau_context *pipe,
{
void *map;
- nouveau_buffer_adjust_score(pipe, res, -250);
-
if ((res->domain == NOUVEAU_BO_VRAM) &&
(res->status & NOUVEAU_BUFFER_STATUS_GPU_WRITING))
nouveau_buffer_download(pipe, res, 0, res->base.width0);
diff --git a/src/gallium/drivers/nv50/nv50_vbo.c b/src/gallium/drivers/nv50/nv50_vbo.c
index ef01e61172d..cb3ea382f3d 100644
--- a/src/gallium/drivers/nv50/nv50_vbo.c
+++ b/src/gallium/drivers/nv50/nv50_vbo.c
@@ -219,7 +219,6 @@ nv50_prevalidate_vbufs(struct nv50_context *nv50)
}
}
nv50_bufctx_add_resident(nv50, NV50_BUFCTX_VERTEX, buf, NOUVEAU_BO_RD);
- nouveau_buffer_adjust_score(&nv50->base, buf, 1);
}
}
@@ -541,8 +540,6 @@ nv50_draw_elements(struct nv50_context *nv50, boolean shorten,
start += nv50->idxbuf.offset >> (index_size >> 1);
- nouveau_buffer_adjust_score(&nv50->base, res, 1);
-
while (instance_count--) {
BEGIN_RING(chan, RING_3D(VERTEX_BEGIN_GL), 1);
OUT_RING (chan, mode);
diff --git a/src/gallium/drivers/nvc0/nvc0_vbo.c b/src/gallium/drivers/nvc0/nvc0_vbo.c
index 3e95d509f99..de456b91945 100644
--- a/src/gallium/drivers/nvc0/nvc0_vbo.c
+++ b/src/gallium/drivers/nvc0/nvc0_vbo.c
@@ -197,7 +197,6 @@ nvc0_prevalidate_vbufs(struct nvc0_context *nvc0)
}
}
nvc0_bufctx_add_resident(nvc0, NVC0_BUFCTX_VERTEX, buf, NOUVEAU_BO_RD);
- nouveau_buffer_adjust_score(&nvc0->base, buf, 1);
}
}
@@ -516,8 +515,6 @@ nvc0_draw_elements(struct nvc0_context *nvc0, boolean shorten,
unsigned offset = nvc0->idxbuf.offset;
unsigned limit = nvc0->idxbuf.buffer->width0 - 1;
- nouveau_buffer_adjust_score(&nvc0->base, res, 1);
-
while (instance_count--) {
MARK_RING (chan, 11, 4);
BEGIN_RING(chan, RING_3D(VERTEX_BEGIN_GL), 1);