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-rw-r--r--src/gallium/drivers/radeon/r600_pipe_common.c8
-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c13
-rw-r--r--src/gallium/drivers/radeonsi/si_shader.c2
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c6
-rw-r--r--src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c8
-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c8
6 files changed, 9 insertions, 36 deletions
diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c
index 5a6f9606b71..26d07750f9f 100644
--- a/src/gallium/drivers/radeon/r600_pipe_common.c
+++ b/src/gallium/drivers/radeon/r600_pipe_common.c
@@ -43,7 +43,7 @@
#define HAVE_LLVM 0
#endif
-#if HAVE_LLVM >= 0x0306
+#if HAVE_LLVM
#include <llvm-c/TargetMachine.h>
#endif
@@ -793,7 +793,7 @@ static void r600_disk_cache_create(struct r600_common_screen *rscreen)
if (rscreen->chip_class < SI) {
res = asprintf(&timestamp_str, "%u",mesa_timestamp);
}
-#if HAVE_LLVM >= 0x0306
+#if HAVE_LLVM
else {
uint32_t llvm_timestamp;
if (disk_cache_get_function_timestamp(LLVMInitializeAMDGPUTargetInfo,
@@ -938,9 +938,9 @@ const char *r600_get_llvm_processor_name(enum radeon_family family)
case CHIP_ICELAND: return "iceland";
case CHIP_CARRIZO: return "carrizo";
case CHIP_FIJI:
- return HAVE_LLVM >= 0x0308 ? "fiji" : "carrizo";
+ return "fiji";
case CHIP_STONEY:
- return HAVE_LLVM >= 0x0308 ? "stoney" : "carrizo";
+ return "stoney";
case CHIP_POLARIS10:
return HAVE_LLVM >= 0x0309 ? "polaris10" : "carrizo";
case CHIP_POLARIS11:
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index a0e90a898c5..d04abb6d203 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -128,10 +128,8 @@ si_create_llvm_target_machine(struct si_screen *sscreen)
return LLVMCreateTargetMachine(si_llvm_get_amdgpu_target(triple), triple,
r600_get_llvm_processor_name(sscreen->b.family),
-#if HAVE_LLVM >= 0x0308
sscreen->b.debug_flags & DBG_SI_SCHED ?
SI_LLVM_DEFAULT_FEATURES ",+si-scheduler" :
-#endif
SI_LLVM_DEFAULT_FEATURES,
LLVMCodeGenLevelDefault,
LLVMRelocDefault,
@@ -417,10 +415,9 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
+ case PIPE_CAP_DOUBLES:
return 1;
- case PIPE_CAP_DOUBLES:
- return HAVE_LLVM >= 0x0307;
case PIPE_CAP_INT64:
case PIPE_CAP_INT64_DIVMOD:
return HAVE_LLVM >= 0x0309;
@@ -456,8 +453,7 @@ static int si_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_FEATURE_LEVEL:
if (si_have_tgsi_compute(sscreen))
return 450;
- return HAVE_LLVM >= 0x0309 ? 420 :
- HAVE_LLVM >= 0x0307 ? 410 : 330;
+ return HAVE_LLVM >= 0x0309 ? 420 : 410;
case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
return MIN2(sscreen->b.info.max_alloc_size, INT_MAX);
@@ -577,12 +573,8 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu
case PIPE_SHADER_FRAGMENT:
case PIPE_SHADER_VERTEX:
case PIPE_SHADER_GEOMETRY:
- break;
case PIPE_SHADER_TESS_CTRL:
case PIPE_SHADER_TESS_EVAL:
- /* LLVM 3.6.2 is required for tessellation because of bug fixes there */
- if (HAVE_LLVM == 0x0306 && MESA_LLVM_VERSION_PATCH < 2)
- return 0;
break;
case PIPE_SHADER_COMPUTE:
switch (param) {
@@ -836,7 +828,6 @@ struct pipe_screen *radeonsi_screen_create(struct radeon_winsys *ws)
sscreen->b.has_streamout = true;
pipe_mutex_init(sscreen->shader_parts_mutex);
sscreen->use_monolithic_shaders =
- HAVE_LLVM < 0x0308 ||
(sscreen->b.debug_flags & DBG_MONOLITHIC_SHADERS) != 0;
sscreen->b.barrier_flags.cp_to_L2 = SI_CONTEXT_INV_SMEM_L1 |
diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index edfa2848535..ba2966124c7 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -600,7 +600,7 @@ static LLVMValueRef get_bounded_indirect_index(struct si_shader_context *ctx,
* - SI & CIK hang
* - VI crashes
*/
- if (HAVE_LLVM <= 0x0308)
+ if (HAVE_LLVM == 0x0308)
return LLVMGetUndef(ctx->i32);
return si_llvm_bound_index(ctx, result, num);
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
index eeff71d5130..1e9a6046f22 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_alu.c
@@ -730,8 +730,7 @@ void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
bld_base->op_actions[TGSI_OPCODE_ARL].emit = emit_arl;
bld_base->op_actions[TGSI_OPCODE_BFI].emit = emit_bfi;
bld_base->op_actions[TGSI_OPCODE_BREV].emit = build_tgsi_intrinsic_nomem;
- bld_base->op_actions[TGSI_OPCODE_BREV].intr_name =
- HAVE_LLVM >= 0x0308 ? "llvm.bitreverse.i32" : "llvm.AMDGPU.brev";
+ bld_base->op_actions[TGSI_OPCODE_BREV].intr_name = "llvm.bitreverse.i32";
bld_base->op_actions[TGSI_OPCODE_CEIL].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_CEIL].intr_name = "llvm.ceil.f32";
bld_base->op_actions[TGSI_OPCODE_CMP].emit = emit_cmp;
@@ -754,8 +753,7 @@ void si_shader_context_init_alu(struct lp_build_tgsi_context *bld_base)
bld_base->op_actions[TGSI_OPCODE_DSQRT].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_DSQRT].intr_name = "llvm.sqrt.f64";
bld_base->op_actions[TGSI_OPCODE_EX2].emit = build_tgsi_intrinsic_nomem;
- bld_base->op_actions[TGSI_OPCODE_EX2].intr_name =
- HAVE_LLVM >= 0x0308 ? "llvm.exp2.f32" : "llvm.AMDIL.exp.";
+ bld_base->op_actions[TGSI_OPCODE_EX2].intr_name = "llvm.exp2.f32";
bld_base->op_actions[TGSI_OPCODE_FLR].emit = build_tgsi_intrinsic_nomem;
bld_base->op_actions[TGSI_OPCODE_FLR].intr_name = "llvm.floor.f32";
bld_base->op_actions[TGSI_OPCODE_FMA].emit =
diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
index c7cf6324e3b..5c63b732b38 100644
--- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
+++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c
@@ -120,18 +120,10 @@ void si_llvm_shader_type(LLVMValueRef F, unsigned type)
static void init_amdgpu_target()
{
gallivm_init_llvm_targets();
-#if HAVE_LLVM < 0x0307
- LLVMInitializeR600TargetInfo();
- LLVMInitializeR600Target();
- LLVMInitializeR600TargetMC();
- LLVMInitializeR600AsmPrinter();
-#else
LLVMInitializeAMDGPUTargetInfo();
LLVMInitializeAMDGPUTarget();
LLVMInitializeAMDGPUTargetMC();
LLVMInitializeAMDGPUAsmPrinter();
-
-#endif
}
static once_flag init_amdgpu_target_once_flag = ONCE_FLAG_INIT;
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index da9371deea0..4a4e06cc3df 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -230,14 +230,6 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd)
goto fail;
}
- /* LLVM 3.6.1 is required for VI. */
- if (ws->info.chip_class >= VI &&
- HAVE_LLVM == 0x0306 && MESA_LLVM_VERSION_PATCH < 1) {
- fprintf(stderr, "amdgpu: LLVM 3.6.1 is required, got LLVM %i.%i.%i\n",
- HAVE_LLVM >> 8, HAVE_LLVM & 255, MESA_LLVM_VERSION_PATCH);
- goto fail;
- }
-
/* family and rev_id are for addrlib */
switch (ws->info.family) {
case CHIP_TAHITI:
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-27 08:41:32 +0000