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-rw-r--r--src/gallium/drivers/radeon/SIInstrInfo.td1
-rw-r--r--src/gallium/drivers/radeon/SIIntrinsics.td2
-rw-r--r--src/gallium/drivers/radeonsi/radeonsi_shader.c4
3 files changed, 4 insertions, 3 deletions
diff --git a/src/gallium/drivers/radeon/SIInstrInfo.td b/src/gallium/drivers/radeon/SIInstrInfo.td
index 81df55d135e..55882808659 100644
--- a/src/gallium/drivers/radeon/SIInstrInfo.td
+++ b/src/gallium/drivers/radeon/SIInstrInfo.td
@@ -364,6 +364,7 @@ class VINTRP <bits <2> op, dag outs, dag ins, string asm, list<dag> pattern> :
let EncodingType = 11; // SIInstrEncodingType::VINTRP
let Uses = [M0];
+ let neverHasSideEffects = 1;
}
class VOP1 <bits<8> op, dag outs, dag ins, string asm, list<dag> pattern> :
diff --git a/src/gallium/drivers/radeon/SIIntrinsics.td b/src/gallium/drivers/radeon/SIIntrinsics.td
index b9544f10687..401325bf5b1 100644
--- a/src/gallium/drivers/radeon/SIIntrinsics.td
+++ b/src/gallium/drivers/radeon/SIIntrinsics.td
@@ -26,7 +26,7 @@ let TargetPrefix = "SI", isTarget = 1 in {
/* Interpolation Intrinsics */
def int_SI_set_M0 : Intrinsic <[llvm_i32_ty], [llvm_i32_ty]>;
- class Interp : Intrinsic <[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], []>;
+ class Interp : Intrinsic <[llvm_float_ty], [llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrReadMem]>;
def int_SI_fs_interp_linear_center : Interp;
def int_SI_fs_interp_linear_centroid : Interp;
diff --git a/src/gallium/drivers/radeonsi/radeonsi_shader.c b/src/gallium/drivers/radeonsi/radeonsi_shader.c
index 98866c4ee1f..d07b050799d 100644
--- a/src/gallium/drivers/radeonsi/radeonsi_shader.c
+++ b/src/gallium/drivers/radeonsi/radeonsi_shader.c
@@ -329,8 +329,8 @@ static void declare_input_fs(
args[1] = attr_number;
args[2] = params;
si_shader_ctx->radeon_bld.inputs[soa_index] =
- lp_build_intrinsic(gallivm->builder, intr_name,
- input_type, args, 3);
+ build_intrinsic(base->gallivm->builder, intr_name,
+ input_type, args, 3, LLVMReadOnlyAttribute);
}
}