diff options
Diffstat (limited to 'src/gallium/winsys')
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_bo.c | 4 | ||||
| -rw-r--r-- | src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 2 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_bo.c | 4 | ||||
| -rw-r--r-- | src/gallium/winsys/radeon/drm/radeon_drm_cs.c | 6 |
4 files changed, 8 insertions, 8 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c index c3e97c22861..6ec7cb79043 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_bo.c @@ -235,7 +235,7 @@ static void *amdgpu_bo_map(struct pb_buffer *buf, * Only check whether the buffer is being used for write. */ if (cs && amdgpu_bo_is_referenced_by_cs_with_usage(cs, bo, RADEON_USAGE_WRITE)) { - cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); + cs->flush_cs(cs->flush_data, PIPE_FLUSH_ASYNC, NULL); return NULL; } @@ -245,7 +245,7 @@ static void *amdgpu_bo_map(struct pb_buffer *buf, } } else { if (cs && amdgpu_bo_is_referenced_by_cs(cs, bo)) { - cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); + cs->flush_cs(cs->flush_data, PIPE_FLUSH_ASYNC, NULL); return NULL; } diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c index 2c6856b8cae..089a3585912 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c @@ -1493,7 +1493,7 @@ static int amdgpu_cs_flush(struct radeon_winsys_cs *rcs, /* The submission has been queued, unlock the fence now. */ simple_mtx_unlock(&ws->bo_fence_lock); - if (!(flags & RADEON_FLUSH_ASYNC)) { + if (!(flags & PIPE_FLUSH_ASYNC)) { amdgpu_cs_sync_flush(rcs); error_code = cur->error_code; } diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c index b4e501c817f..87c3f1e1006 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c @@ -490,7 +490,7 @@ static void *radeon_bo_map(struct pb_buffer *buf, * * Only check whether the buffer is being used for write. */ if (cs && radeon_bo_is_referenced_by_cs_for_write(cs, bo)) { - cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); + cs->flush_cs(cs->flush_data, PIPE_FLUSH_ASYNC, NULL); return NULL; } @@ -500,7 +500,7 @@ static void *radeon_bo_map(struct pb_buffer *buf, } } else { if (cs && radeon_bo_is_referenced_by_cs(cs, bo)) { - cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); + cs->flush_cs(cs->flush_data, PIPE_FLUSH_ASYNC, NULL); return NULL; } diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c index add88f80aae..c3398d0f589 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c @@ -399,7 +399,7 @@ static bool radeon_drm_cs_validate(struct radeon_winsys_cs *rcs) /* Flush if there are any relocs. Clean up otherwise. */ if (cs->csc->num_relocs) { - cs->flush_cs(cs->flush_data, RADEON_FLUSH_ASYNC, NULL); + cs->flush_cs(cs->flush_data, PIPE_FLUSH_ASYNC, NULL); } else { radeon_cs_context_cleanup(cs->csc); cs->base.used_vram = 0; @@ -655,7 +655,7 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, cs->cst->flags[0] |= RADEON_CS_USE_VM; cs->cst->cs.num_chunks = 3; } - if (flags & RADEON_FLUSH_END_OF_FRAME) { + if (flags & PIPE_FLUSH_END_OF_FRAME) { cs->cst->flags[0] |= RADEON_CS_END_OF_FRAME; cs->cst->cs.num_chunks = 3; } @@ -669,7 +669,7 @@ static int radeon_drm_cs_flush(struct radeon_winsys_cs *rcs, if (util_queue_is_initialized(&cs->ws->cs_queue)) { util_queue_add_job(&cs->ws->cs_queue, cs, &cs->flush_completed, radeon_drm_cs_emit_ioctl_oneshot, NULL); - if (!(flags & RADEON_FLUSH_ASYNC)) + if (!(flags & PIPE_FLUSH_ASYNC)) radeon_drm_cs_sync_flush(rcs); } else { radeon_drm_cs_emit_ioctl_oneshot(cs, 0); |