diff options
Diffstat (limited to 'src/gallium/winsys')
32 files changed, 989 insertions, 1061 deletions
diff --git a/src/gallium/winsys/g3dvl/dri/dri_winsys.c b/src/gallium/winsys/g3dvl/dri/dri_winsys.c index 4d10e27c580..8588ddd17cb 100644 --- a/src/gallium/winsys/g3dvl/dri/dri_winsys.c +++ b/src/gallium/winsys/g3dvl/dri/dri_winsys.c @@ -50,7 +50,7 @@ struct vl_dri_context }; static struct pipe_surface* -vl_dri2_get_front(struct vl_dri_screen *vl_dri_scrn, Drawable drawable) +vl_dri2_get_front(struct vl_context *vctx, Drawable drawable) { int w, h; unsigned int attachments[1] = {DRI_BUFFER_FRONT_LEFT}; @@ -59,6 +59,9 @@ vl_dri2_get_front(struct vl_dri_screen *vl_dri_scrn, Drawable drawable) struct pipe_resource *front_tex; struct pipe_surface *front_surf = NULL; + assert(vctx); + + struct vl_dri_screen *vl_dri_scrn = (struct vl_dri_screen*)vctx->vscreen; assert(vl_dri_scrn); dri2_front = DRI2GetBuffers(vl_dri_scrn->dri_screen->display, @@ -74,6 +77,7 @@ vl_dri2_get_front(struct vl_dri_screen *vl_dri_scrn, Drawable drawable) .stride = dri2_front->pitch }; struct pipe_resource template; + struct pipe_surface surf_template; memset(&template, 0, sizeof(struct pipe_resource)); template.target = PIPE_TEXTURE_2D; @@ -87,10 +91,12 @@ vl_dri2_get_front(struct vl_dri_screen *vl_dri_scrn, Drawable drawable) template.flags = 0; front_tex = vl_dri_scrn->base.pscreen->resource_from_handle(vl_dri_scrn->base.pscreen, &template, &dri2_front_handle); - if (front_tex) - front_surf = vl_dri_scrn->base.pscreen->get_tex_surface(vl_dri_scrn->base.pscreen, - front_tex, 0, 0, 0, - PIPE_BIND_RENDER_TARGET); + if (front_tex) { + memset(&surf_template, 0, sizeof(surf_template)); + surf_template.format = front_tex->format; + surf_template.usage = PIPE_BIND_RENDER_TARGET; + front_surf = vctx->vpipe->create_surface(vctx->vpipe, front_tex, &surf_template); + } pipe_resource_reference(&front_tex, NULL); Xfree(dri2_front); } @@ -100,13 +106,15 @@ vl_dri2_get_front(struct vl_dri_screen *vl_dri_scrn, Drawable drawable) static void vl_dri2_flush_frontbuffer(struct pipe_screen *screen, - struct pipe_surface *surf, void *context_private) + struct pipe_resource *resource, + unsigned level, unsigned layer, + void *context_private) { struct vl_dri_context *vl_dri_ctx = (struct vl_dri_context*)context_private; struct vl_dri_screen *vl_dri_scrn = (struct vl_dri_screen*)vl_dri_ctx->base.vscreen; assert(screen); - assert(surf); + assert(resource); assert(context_private); dri2CopyDrawable(vl_dri_scrn->dri_screen, vl_dri_scrn->last_seen_drawable, @@ -114,11 +122,12 @@ vl_dri2_flush_frontbuffer(struct pipe_screen *screen, } struct pipe_surface* -vl_drawable_surface_get(struct vl_screen *vscreen, Drawable drawable) +vl_drawable_surface_get(struct vl_context *vctx, Drawable drawable) { - struct vl_dri_screen *vl_dri_scrn = (struct vl_dri_screen*)vscreen; + assert(vctx); - assert(vscreen); + struct vl_dri_screen *vl_dri_scrn = (struct vl_dri_screen*)vctx->vscreen; + assert(vl_dri_scrn); if (vl_dri_scrn->last_seen_drawable != drawable) { /* Hash table business depends on this equality */ @@ -131,7 +140,7 @@ vl_drawable_surface_get(struct vl_screen *vscreen, Drawable drawable) vl_dri_scrn->last_seen_drawable = drawable; } - return vl_dri2_get_front(vl_dri_scrn, drawable); + return vl_dri2_get_front(vctx, drawable); } void* diff --git a/src/gallium/winsys/g3dvl/vl_winsys.h b/src/gallium/winsys/g3dvl/vl_winsys.h index 381478637a8..58f548849f6 100644 --- a/src/gallium/winsys/g3dvl/vl_winsys.h +++ b/src/gallium/winsys/g3dvl/vl_winsys.h @@ -61,7 +61,7 @@ vl_video_create(struct vl_screen *vscreen, void vl_video_destroy(struct vl_context *vctx); struct pipe_surface* -vl_drawable_surface_get(struct vl_screen *vscreen, Drawable drawable); +vl_drawable_surface_get(struct vl_context *vctx, Drawable drawable); void* vl_contextprivate_get(struct vl_context *vctx, struct pipe_surface *drawable_surface); diff --git a/src/gallium/winsys/i915/drm/i915_drm_batchbuffer.c b/src/gallium/winsys/i915/drm/i915_drm_batchbuffer.c index c6daa52a379..ebe86dcf196 100644 --- a/src/gallium/winsys/i915/drm/i915_drm_batchbuffer.c +++ b/src/gallium/winsys/i915/drm/i915_drm_batchbuffer.c @@ -14,9 +14,6 @@ #define INTEL_BATCH_CLIPRECTS 0x2 #undef INTEL_RUN_SYNC -#undef INTEL_MAP_BATCHBUFFER -#undef INTEL_MAP_GTT -#define INTEL_ALWAYS_FLUSH struct i915_drm_batchbuffer { @@ -72,11 +69,7 @@ i915_drm_batchbuffer_create(struct i915_winsys *iws) batch->actual_size = idws->max_batch_size; -#ifdef INTEL_MAP_BATCHBUFFER - batch->base.map = NULL; -#else batch->base.map = MALLOC(batch->actual_size); -#endif batch->base.ptr = NULL; batch->base.size = 0; @@ -94,7 +87,7 @@ static int i915_drm_batchbuffer_reloc(struct i915_winsys_batchbuffer *ibatch, struct i915_winsys_buffer *buffer, enum i915_winsys_buffer_usage usage, - unsigned pre_add) + unsigned pre_add, bool fenced) { struct i915_drm_batchbuffer *batch = i915_drm_batchbuffer(ibatch); unsigned write_domain = 0; @@ -104,37 +97,44 @@ i915_drm_batchbuffer_reloc(struct i915_winsys_batchbuffer *ibatch, assert(batch->base.relocs < batch->base.max_relocs); - if (usage == I915_USAGE_SAMPLER) { + switch (usage) { + case I915_USAGE_SAMPLER: write_domain = 0; read_domain = I915_GEM_DOMAIN_SAMPLER; - - } else if (usage == I915_USAGE_RENDER) { + break; + case I915_USAGE_RENDER: write_domain = I915_GEM_DOMAIN_RENDER; read_domain = I915_GEM_DOMAIN_RENDER; - - } else if (usage == I915_USAGE_2D_TARGET) { + break; + case I915_USAGE_2D_TARGET: write_domain = I915_GEM_DOMAIN_RENDER; read_domain = I915_GEM_DOMAIN_RENDER; - - } else if (usage == I915_USAGE_2D_SOURCE) { + break; + case I915_USAGE_2D_SOURCE: write_domain = 0; read_domain = I915_GEM_DOMAIN_RENDER; - - } else if (usage == I915_USAGE_VERTEX) { + break; + case I915_USAGE_VERTEX: write_domain = 0; read_domain = I915_GEM_DOMAIN_VERTEX; - - } else { + break; + default: assert(0); return -1; } offset = (unsigned)(batch->base.ptr - batch->base.map); - ret = drm_intel_bo_emit_reloc(batch->bo, offset, - intel_bo(buffer), pre_add, - read_domain, - write_domain); + if (fenced) + ret = drm_intel_bo_emit_reloc_fence(batch->bo, offset, + intel_bo(buffer), pre_add, + read_domain, + write_domain); + else + ret = drm_intel_bo_emit_reloc(batch->bo, offset, + intel_bo(buffer), pre_add, + read_domain, + write_domain); ((uint32_t*)batch->base.ptr)[0] = intel_bo(buffer)->offset + pre_add; batch->base.ptr += 4; @@ -150,70 +150,32 @@ i915_drm_batchbuffer_flush(struct i915_winsys_batchbuffer *ibatch, struct pipe_fence_handle **fence) { struct i915_drm_batchbuffer *batch = i915_drm_batchbuffer(ibatch); - unsigned used = 0; - int ret = 0; + unsigned used; + int ret; - assert(i915_winsys_batchbuffer_space(ibatch) >= 0); + /* MI_BATCH_BUFFER_END */ + i915_winsys_batchbuffer_dword_unchecked(ibatch, (0xA<<23)); used = batch->base.ptr - batch->base.map; - assert((used & 3) == 0); - - -#ifdef INTEL_ALWAYS_FLUSH - /* MI_FLUSH | FLUSH_MAP_CACHE */ - i915_winsys_batchbuffer_dword(ibatch, (0x4<<23)|(1<<0)); - used += 4; -#endif - - if ((used & 4) == 0) { + if (used & 4) { /* MI_NOOP */ - i915_winsys_batchbuffer_dword(ibatch, 0); + i915_winsys_batchbuffer_dword_unchecked(ibatch, 0); + used += 4; } - /* MI_BATCH_BUFFER_END */ - i915_winsys_batchbuffer_dword(ibatch, (0xA<<23)); - - used = batch->base.ptr - batch->base.map; - assert((used & 4) == 0); - -#ifdef INTEL_MAP_BATCHBUFFER -#ifdef INTEL_MAP_GTT - drm_intel_gem_bo_unmap_gtt(batch->bo); -#else - drm_intel_bo_unmap(batch->bo); -#endif -#else - drm_intel_bo_subdata(batch->bo, 0, used, batch->base.map); -#endif /* Do the sending to HW */ - if (i915_drm_winsys(ibatch->iws)->send_cmd) + ret = drm_intel_bo_subdata(batch->bo, 0, used, batch->base.map); + if (ret == 0 && i915_drm_winsys(ibatch->iws)->send_cmd) ret = drm_intel_bo_exec(batch->bo, used, NULL, 0, 0); - else - ret = 0; if (ret != 0 || i915_drm_winsys(ibatch->iws)->dump_cmd) { -#ifdef INTEL_MAP_BATCHBUFFER -#ifdef INTEL_MAP_GTT - drm_intel_gem_bo_map_gtt(batch->bo); -#else - drm_intel_bo_map(batch->bo, 0); -#endif -#endif i915_dump_batchbuffer(ibatch); assert(ret == 0); -#ifdef INTEL_MAP_BATCHBUFFER -#ifdef INTEL_MAP_GTT - drm_intel_gem_bo_unmap_gtt(batch->bo); -#else - drm_intel_bo_unmap(batch->bo); -#endif -#endif - } else { + } + #ifdef INTEL_RUN_SYNC - drm_intel_bo_map(batch->bo, FALSE); - drm_intel_bo_unmap(batch->bo); + drm_intel_bo_wait_rendering(batch->bo); #endif - } if (fence) { ibatch->iws->fence_reference(ibatch->iws, fence, NULL); @@ -237,9 +199,7 @@ i915_drm_batchbuffer_destroy(struct i915_winsys_batchbuffer *ibatch) if (batch->bo) drm_intel_bo_unreference(batch->bo); -#ifndef INTEL_MAP_BATCHBUFFER FREE(batch->base.map); -#endif FREE(batch); } diff --git a/src/gallium/winsys/i915/drm/i915_drm_buffer.c b/src/gallium/winsys/i915/drm/i915_drm_buffer.c index 15ec4487457..01dd4bf062f 100644 --- a/src/gallium/winsys/i915/drm/i915_drm_buffer.c +++ b/src/gallium/winsys/i915/drm/i915_drm_buffer.c @@ -5,14 +5,31 @@ #include "i915_drm.h" +static char *i915_drm_type_to_name(enum i915_winsys_buffer_type type) +{ + char *name; + + if (type == I915_NEW_TEXTURE) { + name = "gallium3d_texture"; + } else if (type == I915_NEW_VERTEX) { + name = "gallium3d_vertex"; + } else if (type == I915_NEW_SCANOUT) { + name = "gallium3d_scanout"; + } else { + assert(0); + name = "gallium3d_unknown"; + } + + return name; +} + static struct i915_winsys_buffer * i915_drm_buffer_create(struct i915_winsys *iws, - unsigned size, unsigned alignment, + unsigned size, enum i915_winsys_buffer_type type) { struct i915_drm_buffer *buf = CALLOC_STRUCT(i915_drm_buffer); struct i915_drm_winsys *idws = i915_drm_winsys(iws); - char *name; if (!buf) return NULL; @@ -21,22 +38,48 @@ i915_drm_buffer_create(struct i915_winsys *iws, buf->flinked = FALSE; buf->flink = 0; - if (type == I915_NEW_TEXTURE) { - name = "gallium3d_texture"; - } else if (type == I915_NEW_VERTEX) { - name = "gallium3d_vertex"; - } else if (type == I915_NEW_SCANOUT) { - name = "gallium3d_scanout"; - } else { - assert(0); - name = "gallium3d_unknown"; - } + buf->bo = drm_intel_bo_alloc(idws->gem_manager, + i915_drm_type_to_name(type), size, 0); - buf->bo = drm_intel_bo_alloc(idws->gem_manager, name, size, alignment); + if (!buf->bo) + goto err; + + return (struct i915_winsys_buffer *)buf; + +err: + assert(0); + FREE(buf); + return NULL; +} + +static struct i915_winsys_buffer * +i915_drm_buffer_create_tiled(struct i915_winsys *iws, + unsigned *stride, unsigned height, + enum i915_winsys_buffer_tile *tiling, + enum i915_winsys_buffer_type type) +{ + struct i915_drm_buffer *buf = CALLOC_STRUCT(i915_drm_buffer); + struct i915_drm_winsys *idws = i915_drm_winsys(iws); + unsigned long pitch = 0; + uint32_t tiling_mode = *tiling; + + if (!buf) + return NULL; + + buf->magic = 0xDEAD1337; + buf->flinked = FALSE; + buf->flink = 0; + + buf->bo = drm_intel_bo_alloc_tiled(idws->gem_manager, + i915_drm_type_to_name(type), + *stride, height, 1, + &tiling_mode, &pitch, 0); if (!buf->bo) goto err; + *stride = pitch; + *tiling = tiling_mode; return (struct i915_winsys_buffer *)buf; err: @@ -47,8 +90,9 @@ err: static struct i915_winsys_buffer * i915_drm_buffer_from_handle(struct i915_winsys *iws, - struct winsys_handle *whandle, - unsigned *stride) + struct winsys_handle *whandle, + enum i915_winsys_buffer_tile *tiling, + unsigned *stride) { struct i915_drm_winsys *idws = i915_drm_winsys(iws); struct i915_drm_buffer *buf = CALLOC_STRUCT(i915_drm_buffer); @@ -68,6 +112,7 @@ i915_drm_buffer_from_handle(struct i915_winsys *iws, drm_intel_bo_get_tiling(buf->bo, &tile, &swizzle); *stride = whandle->stride; + *tiling = tile; return (struct i915_winsys_buffer *)buf; @@ -103,24 +148,6 @@ i915_drm_buffer_get_handle(struct i915_winsys *iws, return TRUE; } -static int -i915_drm_buffer_set_fence_reg(struct i915_winsys *iws, - struct i915_winsys_buffer *buffer, - unsigned stride, - enum i915_winsys_buffer_tile tile) -{ - struct i915_drm_buffer *buf = i915_drm_buffer(buffer); - assert(I915_TILING_NONE == I915_TILE_NONE); - assert(I915_TILING_X == I915_TILE_X); - assert(I915_TILING_Y == I915_TILE_Y); - - if (tile != I915_TILE_NONE) { - assert(buf->map_count == 0); - } - - return drm_intel_bo_set_tiling(buf->bo, &tile, stride); -} - static void * i915_drm_buffer_map(struct i915_winsys *iws, struct i915_winsys_buffer *buffer, @@ -190,9 +217,9 @@ void i915_drm_winsys_init_buffer_functions(struct i915_drm_winsys *idws) { idws->base.buffer_create = i915_drm_buffer_create; + idws->base.buffer_create_tiled = i915_drm_buffer_create_tiled; idws->base.buffer_from_handle = i915_drm_buffer_from_handle; idws->base.buffer_get_handle = i915_drm_buffer_get_handle; - idws->base.buffer_set_fence_reg = i915_drm_buffer_set_fence_reg; idws->base.buffer_map = i915_drm_buffer_map; idws->base.buffer_unmap = i915_drm_buffer_unmap; idws->base.buffer_write = i915_drm_buffer_write; diff --git a/src/gallium/winsys/i915/drm/i915_drm_winsys.c b/src/gallium/winsys/i915/drm/i915_drm_winsys.c index cc0b6a99577..2288b48b2bd 100644 --- a/src/gallium/winsys/i915/drm/i915_drm_winsys.c +++ b/src/gallium/winsys/i915/drm/i915_drm_winsys.c @@ -69,6 +69,7 @@ i915_drm_winsys_create(int drmFD) idws->gem_manager = drm_intel_bufmgr_gem_init(idws->fd, idws->max_batch_size); drm_intel_bufmgr_gem_enable_reuse(idws->gem_manager); + drm_intel_bufmgr_gem_enable_fenced_relocs(idws->gem_manager); idws->dump_cmd = debug_get_bool_option("I915_DUMP_CMD", FALSE); idws->send_cmd = !debug_get_bool_option("I915_NO_HW", FALSE); diff --git a/src/gallium/winsys/i915/sw/i915_sw_batchbuffer.c b/src/gallium/winsys/i915/sw/i915_sw_batchbuffer.c index a480cfed57b..44773ae30e7 100644 --- a/src/gallium/winsys/i915/sw/i915_sw_batchbuffer.c +++ b/src/gallium/winsys/i915/sw/i915_sw_batchbuffer.c @@ -61,7 +61,7 @@ static int i915_sw_batchbuffer_reloc(struct i915_winsys_batchbuffer *ibatch, struct i915_winsys_buffer *buffer, enum i915_winsys_buffer_usage usage, - unsigned pre_add) + unsigned pre_add, bool fenced) { struct i915_sw_batchbuffer *batch = i915_sw_batchbuffer(ibatch); int ret = 0; diff --git a/src/gallium/winsys/i915/sw/i915_sw_buffer.c b/src/gallium/winsys/i915/sw/i915_sw_buffer.c index df175688861..834805e621d 100644 --- a/src/gallium/winsys/i915/sw/i915_sw_buffer.c +++ b/src/gallium/winsys/i915/sw/i915_sw_buffer.c @@ -4,28 +4,15 @@ static struct i915_winsys_buffer * i915_sw_buffer_create(struct i915_winsys *iws, - unsigned size, unsigned alignment, + unsigned size, enum i915_winsys_buffer_type type) { struct i915_sw_buffer *buf = CALLOC_STRUCT(i915_sw_buffer); - char *name; if (!buf) return NULL; - if (type == I915_NEW_TEXTURE) { - name = "gallium3d_texture"; - } else if (type == I915_NEW_VERTEX) { - name = "gallium3d_vertex"; - } else if (type == I915_NEW_SCANOUT) { - name = "gallium3d_scanout"; - } else { - assert(0); - name = "gallium3d_unknown"; - } - buf->magic = 0xDEAD1337; - buf->name = name; buf->type = type; buf->ptr = CALLOC(size, 1); @@ -40,21 +27,32 @@ err: return NULL; } -static int -i915_sw_buffer_set_fence_reg(struct i915_winsys *iws, - struct i915_winsys_buffer *buffer, - unsigned stride, - enum i915_winsys_buffer_tile tile) +static struct i915_winsys_buffer * +i915_sw_buffer_create_tiled(struct i915_winsys *iws, + unsigned *stride, unsigned height, + enum i915_winsys_buffer_tile *tiling, + enum i915_winsys_buffer_type type) { - struct i915_sw_buffer *buf = i915_sw_buffer(buffer); + struct i915_sw_buffer *buf = CALLOC_STRUCT(i915_sw_buffer); + + if (!buf) + return NULL; + + buf->magic = 0xDEAD1337; + buf->type = type; + buf->ptr = CALLOC(*stride * height, 1); + buf->tiling = *tiling; + buf->stride = *stride; - if (tile != I915_TILE_NONE) { - assert(buf->map_count == 0); - } + if (!buf->ptr) + goto err; - buf->tile = tile; + return (struct i915_winsys_buffer *)buf; - return 0; +err: + assert(0); + FREE(buf); + return NULL; } static void * @@ -108,7 +106,7 @@ void i915_sw_winsys_init_buffer_functions(struct i915_sw_winsys *isws) { isws->base.buffer_create = i915_sw_buffer_create; - isws->base.buffer_set_fence_reg = i915_sw_buffer_set_fence_reg; + isws->base.buffer_create_tiled = i915_sw_buffer_create_tiled; isws->base.buffer_map = i915_sw_buffer_map; isws->base.buffer_unmap = i915_sw_buffer_unmap; isws->base.buffer_write = i915_sw_buffer_write; diff --git a/src/gallium/winsys/i915/sw/i915_sw_winsys.h b/src/gallium/winsys/i915/sw/i915_sw_winsys.h index b7b43669f30..3af2548419e 100644 --- a/src/gallium/winsys/i915/sw/i915_sw_winsys.h +++ b/src/gallium/winsys/i915/sw/i915_sw_winsys.h @@ -43,8 +43,8 @@ struct i915_sw_buffer { void *ptr; unsigned map_count; enum i915_winsys_buffer_type type; - enum i915_winsys_buffer_tile tile; - const char *name; + enum i915_winsys_buffer_tile tiling; + unsigned stride; }; static INLINE struct i915_sw_buffer * diff --git a/src/gallium/winsys/i965/xlib/xlib_i965.c b/src/gallium/winsys/i965/xlib/xlib_i965.c index baadd6e89ca..c22df6643aa 100644 --- a/src/gallium/winsys/i965/xlib/xlib_i965.c +++ b/src/gallium/winsys/i965/xlib/xlib_i965.c @@ -42,6 +42,7 @@ #include "i965/brw_winsys.h" #include "i965/brw_screen.h" +#include "i965/brw_resource.h" #include "i965/brw_reg.h" #include "i965/brw_structs_dump.h" @@ -421,25 +422,28 @@ xlib_create_brw_winsys_screen( void ) static void xlib_i965_display_surface(struct xmesa_buffer *xm_buffer, - struct pipe_surface *surf) + struct pipe_resource *resource, + unsigned level, unsigned layer) { - struct brw_surface *surface = brw_surface(surf); - struct xlib_brw_buffer *bo = xlib_brw_buffer(surface->bo); - + struct brw_texture *tex = brw_texture(resource); + struct xlib_brw_buffer *bo = xlib_brw_buffer(tex->bo); + /* not sure if the resource is really useful here but + since it was never implemented anyway... */ if (BRW_DEBUG & DEBUG_WINSYS) - debug_printf("%s offset %x+%x sz %dx%d\n", __FUNCTION__, + debug_printf("%s level %u layer %u offset %x base sz %dx%d\n", __FUNCTION__, + level, layer, bo->offset, - surface->draw_offset, - surf->width, - surf->height); + resource->width0, + resource->height0); } static void xlib_i965_flush_frontbuffer(struct pipe_screen *screen, - struct pipe_surface *surf, - void *context_private) + struct pipe_resource *resource, + unsigned level, unsigned layer, + void *context_private) { - xlib_i965_display_surface(NULL, surf); + xlib_i965_display_surface(NULL, resource, level, layer); } diff --git a/src/gallium/winsys/r600/drm/Makefile b/src/gallium/winsys/r600/drm/Makefile index a396205f897..91c65012c83 100644 --- a/src/gallium/winsys/r600/drm/Makefile +++ b/src/gallium/winsys/r600/drm/Makefile @@ -8,12 +8,12 @@ C_SOURCES = \ bof.c \ evergreen_hw_context.c \ radeon_bo.c \ - radeon_bo_pb.c \ radeon_pciid.c \ r600.c \ r600_bo.c \ r600_drm.c \ - r600_hw_context.c + r600_hw_context.c \ + r600_bomgr.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/r600 \ $(shell pkg-config libdrm --cflags-only-I) diff --git a/src/gallium/winsys/r600/drm/SConscript b/src/gallium/winsys/r600/drm/SConscript index cc053c06dd0..dac0097f144 100644 --- a/src/gallium/winsys/r600/drm/SConscript +++ b/src/gallium/winsys/r600/drm/SConscript @@ -6,12 +6,12 @@ r600_sources = [ 'bof.c', 'evergreen_hw_context.c', 'radeon_bo.c', - 'radeon_bo_pb.c', 'radeon_pciid.c', 'r600.c', 'r600_bo.c', 'r600_drm.c', 'r600_hw_context.c', + 'r600_bomgr.c', ] env.ParseConfig('pkg-config --cflags libdrm_radeon') diff --git a/src/gallium/winsys/r600/drm/evergreen_hw_context.c b/src/gallium/winsys/r600/drm/evergreen_hw_context.c index b93cc650272..2175d578ec7 100644 --- a/src/gallium/winsys/r600/drm/evergreen_hw_context.c +++ b/src/gallium/winsys/r600/drm/evergreen_hw_context.c @@ -36,7 +36,6 @@ #include "pipe/p_compiler.h" #include "util/u_inlines.h" #include "util/u_memory.h" -#include <pipebuffer/pb_bufmgr.h> #include "r600_priv.h" #define GROUP_FORCE_NEW_BLOCK 0 @@ -855,7 +854,7 @@ void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *dr ctx->pm4[ctx->pm4_cdwords++] = draw->vgt_draw_initiator; } ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 0); - ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT; + ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT) | EVENT_INDEX(0); /* flush color buffer */ for (int i = 0; i < 12; i++) { diff --git a/src/gallium/winsys/r600/drm/r600.c b/src/gallium/winsys/r600/drm/r600.c index 0a4d2e791db..b88733f80f1 100644 --- a/src/gallium/winsys/r600/drm/r600.c +++ b/src/gallium/winsys/r600/drm/r600.c @@ -27,7 +27,6 @@ #include "radeon_drm.h" #include "pipe/p_compiler.h" #include "util/u_inlines.h" -#include <pipebuffer/pb_bufmgr.h> #include "r600_priv.h" enum radeon_family r600_get_family(struct radeon *r600) @@ -93,6 +92,12 @@ struct radeon *r600_new(int fd, unsigned device) case CHIP_RV730: case CHIP_RV710: case CHIP_RV740: + case CHIP_CEDAR: + case CHIP_REDWOOD: + case CHIP_JUNIPER: + case CHIP_CYPRESS: + case CHIP_HEMLOCK: + case CHIP_PALM: break; case CHIP_R100: case CHIP_RV100: @@ -121,11 +126,6 @@ struct radeon *r600_new(int fd, unsigned device) case CHIP_RV560: case CHIP_RV570: case CHIP_R580: - case CHIP_CEDAR: - case CHIP_REDWOOD: - case CHIP_JUNIPER: - case CHIP_CYPRESS: - case CHIP_HEMLOCK: default: R600_ERR("unknown or unsupported chipset 0x%04X\n", r600->device); break; @@ -154,6 +154,7 @@ struct radeon *r600_new(int fd, unsigned device) case CHIP_JUNIPER: case CHIP_CYPRESS: case CHIP_HEMLOCK: + case CHIP_PALM: r600->chip_class = EVERGREEN; break; default: diff --git a/src/gallium/winsys/r600/drm/r600_bo.c b/src/gallium/winsys/r600/drm/r600_bo.c index 251f009a6b0..6a3737f0a4a 100644 --- a/src/gallium/winsys/r600/drm/r600_bo.c +++ b/src/gallium/winsys/r600/drm/r600_bo.c @@ -36,142 +36,153 @@ struct r600_bo *r600_bo(struct radeon *radeon, unsigned size, unsigned alignment, unsigned binding, unsigned usage) { - struct r600_bo *ws_bo = calloc(1, sizeof(struct r600_bo)); - struct pb_desc desc; - struct pb_manager *man; + struct r600_bo *bo; + struct radeon_bo *rbo; - desc.alignment = alignment; - desc.usage = (PB_USAGE_CPU_READ_WRITE | PB_USAGE_GPU_READ_WRITE); - ws_bo->size = size; + if (binding & (PIPE_BIND_CONSTANT_BUFFER | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) { + bo = r600_bomgr_bo_create(radeon->bomgr, size, alignment, *radeon->cfence); + if (bo) { + return bo; + } + } - if (binding & (PIPE_BIND_CONSTANT_BUFFER | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) - man = radeon->cman; - else - man = radeon->kman; + rbo = radeon_bo(radeon, 0, size, alignment); + if (rbo == NULL) { + return NULL; + } + + bo = calloc(1, sizeof(struct r600_bo)); + bo->size = size; + bo->alignment = alignment; + bo->bo = rbo; + if (binding & (PIPE_BIND_CONSTANT_BUFFER | PIPE_BIND_VERTEX_BUFFER | PIPE_BIND_INDEX_BUFFER)) { + r600_bomgr_bo_init(radeon->bomgr, bo); + } /* Staging resources particpate in transfers and blits only * and are used for uploads and downloads from regular * resources. We generate them internally for some transfers. */ if (usage == PIPE_USAGE_STAGING) - ws_bo->domains = RADEON_GEM_DOMAIN_CPU | RADEON_GEM_DOMAIN_GTT; - else - ws_bo->domains = (RADEON_GEM_DOMAIN_CPU | - RADEON_GEM_DOMAIN_GTT | - RADEON_GEM_DOMAIN_VRAM); - - - ws_bo->pb = man->create_buffer(man, size, &desc); - if (ws_bo->pb == NULL) { - free(ws_bo); - return NULL; - } + bo->domains = RADEON_GEM_DOMAIN_CPU | RADEON_GEM_DOMAIN_GTT; + else + bo->domains = (RADEON_GEM_DOMAIN_CPU | + RADEON_GEM_DOMAIN_GTT | + RADEON_GEM_DOMAIN_VRAM); - pipe_reference_init(&ws_bo->reference, 1); - return ws_bo; + pipe_reference_init(&bo->reference, 1); + return bo; } struct r600_bo *r600_bo_handle(struct radeon *radeon, unsigned handle, unsigned *array_mode) { - struct r600_bo *ws_bo = calloc(1, sizeof(struct r600_bo)); - struct radeon_bo *bo; + struct r600_bo *bo = calloc(1, sizeof(struct r600_bo)); + struct radeon_bo *rbo; - ws_bo->pb = radeon_bo_pb_create_buffer_from_handle(radeon->kman, handle); - if (!ws_bo->pb) { - free(ws_bo); + rbo = bo->bo = radeon_bo(radeon, handle, 0, 0); + if (rbo == NULL) { + free(bo); return NULL; } - bo = radeon_bo_pb_get_bo(ws_bo->pb); - ws_bo->size = bo->size; - ws_bo->domains = (RADEON_GEM_DOMAIN_CPU | - RADEON_GEM_DOMAIN_GTT | - RADEON_GEM_DOMAIN_VRAM); + bo->size = rbo->size; + bo->domains = (RADEON_GEM_DOMAIN_CPU | + RADEON_GEM_DOMAIN_GTT | + RADEON_GEM_DOMAIN_VRAM); - pipe_reference_init(&ws_bo->reference, 1); + pipe_reference_init(&bo->reference, 1); - radeon_bo_get_tiling_flags(radeon, bo, &ws_bo->tiling_flags, - &ws_bo->kernel_pitch); + radeon_bo_get_tiling_flags(radeon, rbo, &bo->tiling_flags, &bo->kernel_pitch); if (array_mode) { - if (ws_bo->tiling_flags) { - if (ws_bo->tiling_flags & RADEON_TILING_MICRO) + if (bo->tiling_flags) { + if (bo->tiling_flags & RADEON_TILING_MICRO) *array_mode = V_0280A0_ARRAY_1D_TILED_THIN1; - if ((ws_bo->tiling_flags & (RADEON_TILING_MICRO | RADEON_TILING_MACRO)) == + if ((bo->tiling_flags & (RADEON_TILING_MICRO | RADEON_TILING_MACRO)) == (RADEON_TILING_MICRO | RADEON_TILING_MACRO)) *array_mode = V_0280A0_ARRAY_2D_TILED_THIN1; } else { *array_mode = 0; } } - return ws_bo; + return bo; } void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, unsigned usage, void *ctx) { - return pb_map(bo->pb, usage, ctx); + struct pipe_context *pctx = ctx; + + if (usage & PB_USAGE_UNSYNCHRONIZED) { + radeon_bo_map(radeon, bo->bo); + return (uint8_t *) bo->bo->data + bo->offset; + } + + if (p_atomic_read(&bo->bo->reference.count) > 1) { + if (usage & PB_USAGE_DONTBLOCK) { + return NULL; + } + if (ctx) { + pctx->flush(pctx, 0, NULL); + } + } + + if (usage & PB_USAGE_DONTBLOCK) { + uint32_t domain; + + if (radeon_bo_busy(radeon, bo->bo, &domain)) + return NULL; + if (radeon_bo_map(radeon, bo->bo)) { + return NULL; + } + goto out; + } + + radeon_bo_map(radeon, bo->bo); + if (radeon_bo_wait(radeon, bo->bo)) { + radeon_bo_unmap(radeon, bo->bo); + return NULL; + } + +out: + return (uint8_t *) bo->bo->data + bo->offset; } void r600_bo_unmap(struct radeon *radeon, struct r600_bo *bo) { - pb_unmap(bo->pb); + radeon_bo_unmap(radeon, bo->bo); } -static void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo) +void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo) { - if (bo->pb) - pb_reference(&bo->pb, NULL); + if (bo->manager_id) { + if (!r600_bomgr_bo_destroy(radeon->bomgr, bo)) { + /* destroy is delayed by buffer manager */ + return; + } + } + radeon_bo_reference(radeon, &bo->bo, NULL); free(bo); } -void r600_bo_reference(struct radeon *radeon, struct r600_bo **dst, - struct r600_bo *src) +void r600_bo_reference(struct radeon *radeon, struct r600_bo **dst, struct r600_bo *src) { struct r600_bo *old = *dst; - + if (pipe_reference(&(*dst)->reference, &src->reference)) { r600_bo_destroy(radeon, old); } *dst = src; } -unsigned r600_bo_get_handle(struct r600_bo *pb_bo) -{ - struct radeon_bo *bo; - - bo = radeon_bo_pb_get_bo(pb_bo->pb); - if (!bo) - return 0; - - return bo->handle; -} - -unsigned r600_bo_get_size(struct r600_bo *pb_bo) -{ - struct radeon_bo *bo; - - bo = radeon_bo_pb_get_bo(pb_bo->pb); - if (!bo) - return 0; - - return bo->size; -} - -boolean r600_bo_get_winsys_handle(struct radeon *radeon, struct r600_bo *pb_bo, +boolean r600_bo_get_winsys_handle(struct radeon *radeon, struct r600_bo *bo, unsigned stride, struct winsys_handle *whandle) { - struct radeon_bo *bo; - - bo = radeon_bo_pb_get_bo(pb_bo->pb); - if (!bo) - return FALSE; - whandle->stride = stride; switch(whandle->type) { case DRM_API_HANDLE_TYPE_KMS: - whandle->handle = r600_bo_get_handle(pb_bo); + whandle->handle = r600_bo_get_handle(bo); break; case DRM_API_HANDLE_TYPE_SHARED: - if (radeon_bo_get_name(radeon, bo, &whandle->handle)) + if (radeon_bo_get_name(radeon, bo->bo, &whandle->handle)) return FALSE; break; default: diff --git a/src/gallium/winsys/r600/drm/r600_bomgr.c b/src/gallium/winsys/r600/drm/r600_bomgr.c new file mode 100644 index 00000000000..446ef0f9cfc --- /dev/null +++ b/src/gallium/winsys/r600/drm/r600_bomgr.c @@ -0,0 +1,161 @@ +/* + * Copyright 2010 VMWare. + * Copyright 2010 Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * on the rights to use, copy, modify, merge, publish, distribute, sub + * license, and/or sell copies of the Software, and to permit persons to whom + * the Software is furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice (including the next + * paragraph) shall be included in all copies or substantial portions of the + * Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL + * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, + * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR + * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * USE OR OTHER DEALINGS IN THE SOFTWARE. + * + * Authors: + * Jose Fonseca <jrfonseca-at-vmware-dot-com> + * Thomas Hellström <thomas-at-vmware-dot-com> + * Jerome Glisse <[email protected]> + */ +#include <util/u_memory.h> +#include <util/u_double_list.h> +#include <util/u_time.h> +#include <pipebuffer/pb_bufmgr.h> +#include "r600_priv.h" + +static void r600_bomgr_timeout_flush(struct r600_bomgr *mgr) +{ + struct r600_bo *bo, *tmp; + int64_t now; + + now = os_time_get(); + LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &mgr->delayed, list) { + if(!os_time_timeout(bo->start, bo->end, now)) + break; + + mgr->num_delayed--; + bo->manager_id = 0; + LIST_DEL(&bo->list); + r600_bo_destroy(mgr->radeon, bo); + } +} + +static INLINE int r600_bo_is_compat(struct r600_bomgr *mgr, + struct r600_bo *bo, + unsigned size, + unsigned alignment, + unsigned cfence) +{ + if(bo->size < size) { + return 0; + } + + /* be lenient with size */ + if(bo->size >= 2*size) { + return 0; + } + + if(!pb_check_alignment(alignment, bo->alignment)) { + return 0; + } + + if (!fence_is_after(cfence, bo->fence)) { + return 0; + } + + return 1; +} + +struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr, + unsigned size, + unsigned alignment, + unsigned cfence) +{ + struct r600_bo *bo, *tmp; + int64_t now; + + + pipe_mutex_lock(mgr->mutex); + + now = os_time_get(); + LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &mgr->delayed, list) { + if(r600_bo_is_compat(mgr, bo, size, alignment, cfence)) { + LIST_DEL(&bo->list); + --mgr->num_delayed; + r600_bomgr_timeout_flush(mgr); + pipe_mutex_unlock(mgr->mutex); + LIST_INITHEAD(&bo->list); + pipe_reference_init(&bo->reference, 1); + return bo; + } + + if(os_time_timeout(bo->start, bo->end, now)) { + mgr->num_delayed--; + bo->manager_id = 0; + LIST_DEL(&bo->list); + r600_bo_destroy(mgr->radeon, bo); + } + } + + pipe_mutex_unlock(mgr->mutex); + return NULL; +} + +void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo) +{ + LIST_INITHEAD(&bo->list); + bo->manager_id = 1; +} + +bool r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo) +{ + bo->start = os_time_get(); + bo->end = bo->start + mgr->usecs; + pipe_mutex_lock(mgr->mutex); + LIST_ADDTAIL(&bo->list, &mgr->delayed); + ++mgr->num_delayed; + pipe_mutex_unlock(mgr->mutex); + return FALSE; +} + +void r600_bomgr_destroy(struct r600_bomgr *mgr) +{ + struct r600_bo *bo, *tmp; + + pipe_mutex_lock(mgr->mutex); + LIST_FOR_EACH_ENTRY_SAFE(bo, tmp, &mgr->delayed, list) { + mgr->num_delayed--; + bo->manager_id = 0; + LIST_DEL(&bo->list); + r600_bo_destroy(mgr->radeon, bo); + } + pipe_mutex_unlock(mgr->mutex); + + FREE(mgr); +} + +struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs) +{ + struct r600_bomgr *mgr; + + mgr = CALLOC_STRUCT(r600_bomgr); + if (mgr == NULL) + return NULL; + + mgr->radeon = radeon; + mgr->usecs = usecs; + LIST_INITHEAD(&mgr->delayed); + mgr->num_delayed = 0; + pipe_mutex_init(mgr->mutex); + + return mgr; +} diff --git a/src/gallium/winsys/r600/drm/r600_drm.c b/src/gallium/winsys/r600/drm/r600_drm.c index 6742993ef3e..3cbbf91878d 100644 --- a/src/gallium/winsys/r600/drm/r600_drm.c +++ b/src/gallium/winsys/r600/drm/r600_drm.c @@ -30,7 +30,6 @@ #include <sys/ioctl.h> #include "util/u_inlines.h" #include "util/u_debug.h" -#include <pipebuffer/pb_bufmgr.h> #include "r600.h" #include "r600_priv.h" #include "r600_drm_public.h" @@ -40,6 +39,9 @@ #ifndef RADEON_INFO_TILING_CONFIG #define RADEON_INFO_TILING_CONFIG 0x6 #endif + +static struct radeon *radeon_new(int fd, unsigned device); + static int radeon_get_device(struct radeon *radeon) { struct drm_radeon_info info; @@ -108,7 +110,7 @@ static int radeon_drm_get_tiling(struct radeon *radeon) return 0; } -struct radeon *radeon_new(int fd, unsigned device) +static struct radeon *radeon_new(int fd, unsigned device) { struct radeon *radeon; int r; @@ -150,6 +152,7 @@ struct radeon *radeon_new(int fd, unsigned device) case CHIP_JUNIPER: case CHIP_CYPRESS: case CHIP_HEMLOCK: + case CHIP_PALM: break; case CHIP_R100: case CHIP_RV100: @@ -211,6 +214,7 @@ struct radeon *radeon_new(int fd, unsigned device) case CHIP_JUNIPER: case CHIP_CYPRESS: case CHIP_HEMLOCK: + case CHIP_PALM: radeon->chip_class = EVERGREEN; /* set default group bytes, overridden by tiling info ioctl */ radeon->tiling_info.group_bytes = 512; @@ -225,12 +229,10 @@ struct radeon *radeon_new(int fd, unsigned device) if (radeon_drm_get_tiling(radeon)) return NULL; } - radeon->kman = radeon_bo_pbmgr_create(radeon); - if (!radeon->kman) - return NULL; - radeon->cman = pb_cache_manager_create(radeon->kman, 100000); - if (!radeon->cman) + radeon->bomgr = r600_bomgr_create(radeon, 1000000); + if (radeon->bomgr == NULL) { return NULL; + } return radeon; } @@ -247,14 +249,11 @@ struct radeon *radeon_decref(struct radeon *radeon) return NULL; } - if (radeon->cman) - radeon->cman->destroy(radeon->cman); - - if (radeon->kman) - radeon->kman->destroy(radeon->kman); + if (radeon->bomgr) + r600_bomgr_destroy(radeon->bomgr); - if (radeon->fd >= 0) - drmClose(radeon->fd); + if (radeon->fd >= 0) + drmClose(radeon->fd); free(radeon); return NULL; diff --git a/src/gallium/winsys/r600/drm/r600_hw_context.c b/src/gallium/winsys/r600/drm/r600_hw_context.c index de228918953..d01ec3ee9b0 100644 --- a/src/gallium/winsys/r600/drm/r600_hw_context.c +++ b/src/gallium/winsys/r600/drm/r600_hw_context.c @@ -28,16 +28,15 @@ #include <string.h> #include <stdlib.h> #include <assert.h> +#include <pipe/p_compiler.h> +#include <util/u_inlines.h> +#include <util/u_memory.h> +#include <pipebuffer/pb_bufmgr.h> #include "xf86drm.h" -#include "r600.h" -#include "r600d.h" #include "radeon_drm.h" -#include "bof.h" -#include "pipe/p_compiler.h" -#include "util/u_inlines.h" -#include "util/u_memory.h" -#include <pipebuffer/pb_bufmgr.h> #include "r600_priv.h" +#include "bof.h" +#include "r600d.h" #define GROUP_FORCE_NEW_BLOCK 0 @@ -50,6 +49,7 @@ int r600_context_init_fence(struct r600_context *ctx) } ctx->cfence = r600_bo_map(ctx->radeon, ctx->fence_bo, PB_USAGE_UNSYNCHRONIZED, NULL); *ctx->cfence = 0; + ctx->radeon->cfence = ctx->cfence; LIST_INITHEAD(&ctx->fenced_bo); return 0; } @@ -618,6 +618,9 @@ void r600_context_fini(struct r600_context *ctx) range = &ctx->range[CTX_RANGE_ID(ctx, offset)]; range->blocks[CTX_BLOCK_ID(ctx, offset)] = NULL; } + for (int k = 1; k <= block->nbo; k++) { + r600_bo_reference(ctx->radeon, &block->reloc[k].bo, NULL); + } free(block); } } @@ -811,6 +814,7 @@ void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *r ctx->reloc[ctx->creloc].write_domain = rbo->domains & (RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM); ctx->reloc[ctx->creloc].flags = 0; radeon_bo_reference(ctx->radeon, &ctx->bo[ctx->creloc], bo); + rbo->fence = ctx->fence; ctx->creloc++; /* set PKT3 to point to proper reloc */ *pm4 = bo->reloc_id; @@ -833,6 +837,7 @@ void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_stat /* find relocation */ id = block->pm4_bo_index[id]; r600_bo_reference(ctx->radeon, &block->reloc[id].bo, state->regs[i].bo); + state->regs[i].bo->fence = ctx->fence; } if (!(block->status & R600_BLOCK_STATUS_DIRTY)) { block->status |= R600_BLOCK_STATUS_ENABLED; @@ -872,10 +877,13 @@ static inline void r600_context_pipe_state_set_resource(struct r600_context *ctx */ r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->regs[0].bo); r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->regs[0].bo); + state->regs[0].bo->fence = ctx->fence; } else { /* TEXTURE RESOURCE */ r600_bo_reference(ctx->radeon, &block->reloc[1].bo, state->regs[2].bo); r600_bo_reference(ctx->radeon, &block->reloc[2].bo, state->regs[3].bo); + state->regs[2].bo->fence = ctx->fence; + state->regs[3].bo->fence = ctx->fence; } if (!(block->status & R600_BLOCK_STATUS_DIRTY)) { block->status |= R600_BLOCK_STATUS_ENABLED; @@ -1108,9 +1116,9 @@ void r600_context_flush(struct r600_context *ctx) /* suspend queries */ r600_context_queries_suspend(ctx); - radeon_bo_pbmgr_flush_maps(ctx->radeon->kman); - /* emit fence */ + ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE, 0); + ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_PS_PARTIAL_FLUSH) | EVENT_INDEX(4); ctx->pm4[ctx->pm4_cdwords++] = PKT3(PKT3_EVENT_WRITE_EOP, 4); ctx->pm4[ctx->pm4_cdwords++] = EVENT_TYPE(EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT) | EVENT_INDEX(5); ctx->pm4[ctx->pm4_cdwords++] = 0; diff --git a/src/gallium/winsys/r600/drm/r600_priv.h b/src/gallium/winsys/r600/drm/r600_priv.h index 9fd77b71c77..056d0255be2 100644 --- a/src/gallium/winsys/r600/drm/r600_priv.h +++ b/src/gallium/winsys/r600/drm/r600_priv.h @@ -30,24 +30,24 @@ #include <stdint.h> #include <stdlib.h> #include <assert.h> -#include <pipebuffer/pb_bufmgr.h> -#include "util/u_double_list.h" +#include <util/u_double_list.h> +#include <util/u_inlines.h> +#include <os/os_thread.h> #include "r600.h" +struct r600_bomgr; + struct radeon { int fd; int refcount; unsigned device; unsigned family; enum chip_class chip_class; - struct pb_manager *kman; /* kernel bo manager */ - struct pb_manager *cman; /* cached bo manager */ - struct r600_tiling_info tiling_info; + struct r600_tiling_info tiling_info; + struct r600_bomgr *bomgr; + unsigned *cfence; }; -struct radeon *r600_new(int fd, unsigned device); -void r600_delete(struct radeon *r600); - struct r600_reg { unsigned opcode; unsigned offset_base; @@ -75,28 +75,49 @@ struct radeon_bo { struct r600_bo { struct pipe_reference reference; - struct pb_buffer *pb; unsigned size; unsigned tiling_flags; - unsigned kernel_pitch; + unsigned kernel_pitch; unsigned domains; + struct radeon_bo *bo; + unsigned fence; + /* manager data */ + struct list_head list; + unsigned manager_id; + unsigned alignment; + unsigned offset; + int64_t start; + int64_t end; }; +struct r600_bomgr { + struct radeon *radeon; + unsigned usecs; + pipe_mutex mutex; + struct list_head delayed; + unsigned num_delayed; +}; -/* radeon_pciid.c */ -unsigned radeon_family_from_device(unsigned device); +/* + * r600_drm.c + */ +struct radeon *r600_new(int fd, unsigned device); +void r600_delete(struct radeon *r600); -/* r600_drm.c */ -struct radeon *radeon_decref(struct radeon *radeon); +/* + * radeon_pciid.c + */ +unsigned radeon_family_from_device(unsigned device); -/* radeon_bo.c */ +/* + * radeon_bo.c + */ struct radeon_bo *radeon_bo(struct radeon *radeon, unsigned handle, unsigned size, unsigned alignment); void radeon_bo_reference(struct radeon *radeon, struct radeon_bo **dst, struct radeon_bo *src); int radeon_bo_wait(struct radeon *radeon, struct radeon_bo *bo); int radeon_bo_busy(struct radeon *radeon, struct radeon_bo *bo, uint32_t *domain); -void radeon_bo_pbmgr_flush_maps(struct pb_manager *_mgr); int radeon_bo_fencelist(struct radeon *radeon, struct radeon_bo **bolist, uint32_t num_bo); int radeon_bo_get_tiling_flags(struct radeon *radeon, struct radeon_bo *bo, @@ -106,13 +127,9 @@ int radeon_bo_get_name(struct radeon *radeon, struct radeon_bo *bo, uint32_t *name); -/* radeon_bo_pb.c */ -struct radeon_bo *radeon_bo_pb_get_bo(struct pb_buffer *_buf); -struct pb_manager *radeon_bo_pbmgr_create(struct radeon *radeon); -struct pb_buffer *radeon_bo_pb_create_buffer_from_handle(struct pb_manager *_mgr, - uint32_t handle); - -/* r600_hw_context.c */ +/* + * r600_hw_context.c + */ int r600_context_init_fence(struct r600_context *ctx); void r600_context_bo_reloc(struct r600_context *ctx, u32 *pm4, struct r600_bo *rbo); void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags, @@ -120,14 +137,27 @@ void r600_context_bo_flush(struct r600_context *ctx, unsigned flush_flags, struct r600_bo *r600_context_reg_bo(struct r600_context *ctx, unsigned offset); int r600_context_add_block(struct r600_context *ctx, const struct r600_reg *reg, unsigned nreg); -/* r600_bo.c */ -unsigned r600_bo_get_handle(struct r600_bo *bo); -unsigned r600_bo_get_size(struct r600_bo *bo); -static INLINE struct radeon_bo *r600_bo_get_bo(struct r600_bo *bo) -{ - return radeon_bo_pb_get_bo(bo->pb); -} +/* + * r600_bo.c + */ +void r600_bo_destroy(struct radeon *radeon, struct r600_bo *bo); +/* + * r600_bomgr.c + */ +struct r600_bomgr *r600_bomgr_create(struct radeon *radeon, unsigned usecs); +void r600_bomgr_destroy(struct r600_bomgr *mgr); +bool r600_bomgr_bo_destroy(struct r600_bomgr *mgr, struct r600_bo *bo); +void r600_bomgr_bo_init(struct r600_bomgr *mgr, struct r600_bo *bo); +struct r600_bo *r600_bomgr_bo_create(struct r600_bomgr *mgr, + unsigned size, + unsigned alignment, + unsigned cfence); + + +/* + * helpers + */ #define CTX_RANGE_ID(ctx, offset) (((offset) >> (ctx)->hash_shift) & 255) #define CTX_BLOCK_ID(ctx, offset) ((offset) & ((1 << (ctx)->hash_shift) - 1)) @@ -175,6 +205,9 @@ static inline void r600_context_block_emit_dirty(struct r600_context *ctx, struc LIST_DELINIT(&block->list); } +/* + * radeon_bo.c + */ static inline int radeon_bo_map(struct radeon *radeon, struct radeon_bo *bo) { bo->map_count++; @@ -187,4 +220,35 @@ static inline void radeon_bo_unmap(struct radeon *radeon, struct radeon_bo *bo) assert(bo->map_count >= 0); } +/* + * r600_bo + */ +static inline struct radeon_bo *r600_bo_get_bo(struct r600_bo *bo) +{ + return bo->bo; +} + +static unsigned inline r600_bo_get_handle(struct r600_bo *bo) +{ + return bo->bo->handle; +} + +static unsigned inline r600_bo_get_size(struct r600_bo *bo) +{ + return bo->size; +} + +/* + * fence + */ +static inline bool fence_is_after(unsigned fence, unsigned ofence) +{ + /* handle wrap around */ + if (fence < 0x80000000 && ofence > 0x80000000) + return TRUE; + if (fence > ofence) + return TRUE; + return FALSE; +} + #endif diff --git a/src/gallium/winsys/r600/drm/r600d.h b/src/gallium/winsys/r600/drm/r600d.h index 4a08d504aab..1c1ac76fe69 100644 --- a/src/gallium/winsys/r600/drm/r600d.h +++ b/src/gallium/winsys/r600/drm/r600d.h @@ -91,6 +91,7 @@ #define PKT3_SET_CTL_CONST 0x6F #define PKT3_SURFACE_BASE_UPDATE 0x73 +#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_TS_EVENT 0x14 #define EVENT_TYPE_ZPASS_DONE 0x15 #define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 diff --git a/src/gallium/winsys/r600/drm/radeon_bo_pb.c b/src/gallium/winsys/r600/drm/radeon_bo_pb.c deleted file mode 100644 index 312552f0758..00000000000 --- a/src/gallium/winsys/r600/drm/radeon_bo_pb.c +++ /dev/null @@ -1,287 +0,0 @@ -/* - * Copyright 2010 Dave Airlie - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * Authors: - * Dave Airlie - */ -#include <util/u_inlines.h> -#include <util/u_memory.h> -#include <util/u_double_list.h> -#include <pipebuffer/pb_buffer.h> -#include <pipebuffer/pb_bufmgr.h> -#include "r600_priv.h" - -struct radeon_bo_pb { - struct pb_buffer b; - struct radeon_bo *bo; - - struct radeon_bo_pbmgr *mgr; - struct list_head maplist; -}; - -extern const struct pb_vtbl radeon_bo_pb_vtbl; - -static INLINE struct radeon_bo_pb *radeon_bo_pb(struct pb_buffer *buf) -{ - assert(buf); - assert(buf->vtbl == &radeon_bo_pb_vtbl); - return (struct radeon_bo_pb *)buf; -} - -struct radeon_bo_pbmgr { - struct pb_manager b; - struct radeon *radeon; - struct list_head buffer_map_list; -}; - -static INLINE struct radeon_bo_pbmgr *radeon_bo_pbmgr(struct pb_manager *mgr) -{ - assert(mgr); - return (struct radeon_bo_pbmgr *)mgr; -} - -static void radeon_bo_pb_destroy(struct pb_buffer *_buf) -{ - struct radeon_bo_pb *buf = radeon_bo_pb(_buf); - - /* If this buffer is on the list of buffers to unmap, - * do the unmapping now. - */ - if (!LIST_IS_EMPTY(&buf->maplist)) - radeon_bo_unmap(buf->mgr->radeon, buf->bo); - - LIST_DEL(&buf->maplist); - radeon_bo_reference(buf->mgr->radeon, &buf->bo, NULL); - FREE(buf); -} - -static void * -radeon_bo_pb_map_internal(struct pb_buffer *_buf, - unsigned flags, void *ctx) -{ - struct radeon_bo_pb *buf = radeon_bo_pb(_buf); - struct pipe_context *pctx = ctx; - - if (flags & PB_USAGE_UNSYNCHRONIZED) { - if (radeon_bo_map(buf->mgr->radeon, buf->bo)) { - return NULL; - } - LIST_DELINIT(&buf->maplist); - return buf->bo->data; - } - - if (p_atomic_read(&buf->bo->reference.count) > 1) { - if (flags & PB_USAGE_DONTBLOCK) { - return NULL; - } - if (ctx) { - pctx->flush(pctx, 0, NULL); - } - } - - if (flags & PB_USAGE_DONTBLOCK) { - uint32_t domain; - if (radeon_bo_busy(buf->mgr->radeon, buf->bo, &domain)) - return NULL; - if (radeon_bo_map(buf->mgr->radeon, buf->bo)) { - return NULL; - } - goto out; - } - - if (radeon_bo_map(buf->mgr->radeon, buf->bo)) { - return NULL; - } - if (radeon_bo_wait(buf->mgr->radeon, buf->bo)) { - radeon_bo_unmap(buf->mgr->radeon, buf->bo); - return NULL; - } -out: - LIST_DELINIT(&buf->maplist); - return buf->bo->data; -} - -static void radeon_bo_pb_unmap_internal(struct pb_buffer *_buf) -{ - struct radeon_bo_pb *buf = radeon_bo_pb(_buf); - LIST_ADDTAIL(&buf->maplist, &buf->mgr->buffer_map_list); -} - -static void -radeon_bo_pb_get_base_buffer(struct pb_buffer *buf, - struct pb_buffer **base_buf, - unsigned *offset) -{ - *base_buf = buf; - *offset = 0; -} - -static enum pipe_error -radeon_bo_pb_validate(struct pb_buffer *_buf, - struct pb_validate *vl, - unsigned flags) -{ - /* Always pinned */ - return PIPE_OK; -} - -static void -radeon_bo_pb_fence(struct pb_buffer *buf, - struct pipe_fence_handle *fence) -{ -} - -const struct pb_vtbl radeon_bo_pb_vtbl = { - radeon_bo_pb_destroy, - radeon_bo_pb_map_internal, - radeon_bo_pb_unmap_internal, - radeon_bo_pb_validate, - radeon_bo_pb_fence, - radeon_bo_pb_get_base_buffer, -}; - -struct pb_buffer * -radeon_bo_pb_create_buffer_from_handle(struct pb_manager *_mgr, - uint32_t handle) -{ - struct radeon_bo_pbmgr *mgr = radeon_bo_pbmgr(_mgr); - struct radeon *radeon = mgr->radeon; - struct radeon_bo_pb *bo; - struct radeon_bo *hw_bo; - - hw_bo = radeon_bo(radeon, handle, 0, 0); - if (hw_bo == NULL) - return NULL; - - bo = CALLOC_STRUCT(radeon_bo_pb); - if (!bo) { - radeon_bo_reference(radeon, &hw_bo, NULL); - return NULL; - } - - LIST_INITHEAD(&bo->maplist); - pipe_reference_init(&bo->b.base.reference, 1); - bo->b.base.alignment = 0; - bo->b.base.usage = PB_USAGE_GPU_WRITE | PB_USAGE_GPU_READ; - bo->b.base.size = hw_bo->size; - bo->b.vtbl = &radeon_bo_pb_vtbl; - bo->mgr = mgr; - - bo->bo = hw_bo; - - return &bo->b; -} - -static struct pb_buffer * -radeon_bo_pb_create_buffer(struct pb_manager *_mgr, - pb_size size, - const struct pb_desc *desc) -{ - struct radeon_bo_pbmgr *mgr = radeon_bo_pbmgr(_mgr); - struct radeon *radeon = mgr->radeon; - struct radeon_bo_pb *bo; - - bo = CALLOC_STRUCT(radeon_bo_pb); - if (!bo) - goto error1; - - pipe_reference_init(&bo->b.base.reference, 1); - bo->b.base.alignment = desc->alignment; - bo->b.base.usage = desc->usage; - bo->b.base.size = size; - bo->b.vtbl = &radeon_bo_pb_vtbl; - bo->mgr = mgr; - - LIST_INITHEAD(&bo->maplist); - - bo->bo = radeon_bo(radeon, 0, size, desc->alignment); - if (bo->bo == NULL) - goto error2; - return &bo->b; - -error2: - FREE(bo); -error1: - return NULL; -} - -static void -radeon_bo_pbmgr_flush(struct pb_manager *mgr) -{ - /* NOP */ -} - -static void -radeon_bo_pbmgr_destroy(struct pb_manager *_mgr) -{ - struct radeon_bo_pbmgr *mgr = radeon_bo_pbmgr(_mgr); - FREE(mgr); -} - -struct pb_manager *radeon_bo_pbmgr_create(struct radeon *radeon) -{ - struct radeon_bo_pbmgr *mgr; - - mgr = CALLOC_STRUCT(radeon_bo_pbmgr); - if (!mgr) - return NULL; - - mgr->b.destroy = radeon_bo_pbmgr_destroy; - mgr->b.create_buffer = radeon_bo_pb_create_buffer; - mgr->b.flush = radeon_bo_pbmgr_flush; - - mgr->radeon = radeon; - LIST_INITHEAD(&mgr->buffer_map_list); - return &mgr->b; -} - -void radeon_bo_pbmgr_flush_maps(struct pb_manager *_mgr) -{ - struct radeon_bo_pbmgr *mgr = radeon_bo_pbmgr(_mgr); - struct radeon_bo_pb *rpb = NULL; - struct radeon_bo_pb *t_rpb; - - LIST_FOR_EACH_ENTRY_SAFE(rpb, t_rpb, &mgr->buffer_map_list, maplist) { - radeon_bo_unmap(mgr->radeon, rpb->bo); - LIST_DELINIT(&rpb->maplist); - } - - LIST_INITHEAD(&mgr->buffer_map_list); -} - -struct radeon_bo *radeon_bo_pb_get_bo(struct pb_buffer *_buf) -{ - struct radeon_bo_pb *buf; - if (_buf->vtbl == &radeon_bo_pb_vtbl) { - buf = radeon_bo_pb(_buf); - return buf->bo; - } else { - struct pb_buffer *base_buf; - pb_size offset; - pb_get_base_buffer(_buf, &base_buf, &offset); - if (base_buf->vtbl == &radeon_bo_pb_vtbl) { - buf = radeon_bo_pb(base_buf); - return buf->bo; - } - } - return NULL; -} diff --git a/src/gallium/winsys/r600/drm/radeon_pciid.c b/src/gallium/winsys/r600/drm/radeon_pciid.c index 08cc1c41e37..92560a488ae 100644 --- a/src/gallium/winsys/r600/drm/radeon_pciid.c +++ b/src/gallium/winsys/r600/drm/radeon_pciid.c @@ -24,7 +24,7 @@ * Jerome Glisse */ #include <stdlib.h> -#include "r600.h" +#include "r600_priv.h" struct pci_id { unsigned vendor; @@ -441,6 +441,10 @@ struct pci_id radeon_pci_id[] = { {0x1002, 0x9713, CHIP_RS880}, {0x1002, 0x9714, CHIP_RS880}, {0x1002, 0x9715, CHIP_RS880}, + {0x1002, 0x9802, CHIP_PALM}, + {0x1002, 0x9803, CHIP_PALM}, + {0x1002, 0x9804, CHIP_PALM}, + {0x1002, 0x9805, CHIP_PALM}, {0, 0}, }; @@ -456,73 +460,3 @@ unsigned radeon_family_from_device(unsigned device) } return CHIP_UNKNOWN; } - -int radeon_is_family_compatible(unsigned family1, unsigned family2) -{ - switch (family1) { - case CHIP_R600: - case CHIP_RV610: - case CHIP_RV630: - case CHIP_RV670: - case CHIP_RV620: - case CHIP_RV635: - case CHIP_RS780: - case CHIP_RS880: - case CHIP_RV770: - case CHIP_RV730: - case CHIP_RV710: - case CHIP_RV740: - switch (family2) { - case CHIP_R600: - case CHIP_RV610: - case CHIP_RV630: - case CHIP_RV670: - case CHIP_RV620: - case CHIP_RV635: - case CHIP_RS780: - case CHIP_RS880: - case CHIP_RV770: - case CHIP_RV730: - case CHIP_RV710: - case CHIP_RV740: - return 1; - default: - return 0; - } - break; - case CHIP_R100: - case CHIP_RV100: - case CHIP_RS100: - case CHIP_RV200: - case CHIP_RS200: - case CHIP_R200: - case CHIP_RV250: - case CHIP_RS300: - case CHIP_RV280: - case CHIP_R300: - case CHIP_R350: - case CHIP_RV350: - case CHIP_RV380: - case CHIP_R420: - case CHIP_R423: - case CHIP_RV410: - case CHIP_RS400: - case CHIP_RS480: - case CHIP_RS600: - case CHIP_RS690: - case CHIP_RS740: - case CHIP_RV515: - case CHIP_R520: - case CHIP_RV530: - case CHIP_RV560: - case CHIP_RV570: - case CHIP_R580: - case CHIP_CEDAR: - case CHIP_REDWOOD: - case CHIP_JUNIPER: - case CHIP_CYPRESS: - case CHIP_HEMLOCK: - default: - return 0; - } -} diff --git a/src/gallium/winsys/radeon/drm/Makefile b/src/gallium/winsys/radeon/drm/Makefile index 7f69e392735..aa73edde34e 100644 --- a/src/gallium/winsys/radeon/drm/Makefile +++ b/src/gallium/winsys/radeon/drm/Makefile @@ -6,7 +6,7 @@ LIBNAME = radeonwinsys C_SOURCES = \ radeon_drm_buffer.c \ - radeon_drm.c \ + radeon_drm_common.c \ radeon_r300.c LIBRARY_INCLUDES = -I$(TOP)/src/gallium/drivers/r300 \ diff --git a/src/gallium/winsys/radeon/drm/SConscript b/src/gallium/winsys/radeon/drm/SConscript index 60e409fe10f..2dbf61a7ba3 100644 --- a/src/gallium/winsys/radeon/drm/SConscript +++ b/src/gallium/winsys/radeon/drm/SConscript @@ -4,7 +4,7 @@ env = env.Clone() radeon_sources = [ 'radeon_drm_buffer.c', - 'radeon_drm.c', + 'radeon_drm_common.c', 'radeon_r300.c', ] diff --git a/src/gallium/winsys/radeon/drm/radeon_buffer.h b/src/gallium/winsys/radeon/drm/radeon_buffer.h deleted file mode 100644 index a8137d85e83..00000000000 --- a/src/gallium/winsys/radeon/drm/radeon_buffer.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright © 2008 Jérôme Glisse - * All Rights Reserved. - * - * Permission is hereby granted, free of charge, to any person obtaining - * a copy of this software and associated documentation files (the - * "Software"), to deal in the Software without restriction, including - * without limitation the rights to use, copy, modify, merge, publish, - * distribute, sub license, and/or sell copies of the Software, and to - * permit persons to whom the Software is furnished to do so, subject to - * the following conditions: - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS - * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. - * - * The above copyright notice and this permission notice (including the - * next paragraph) shall be included in all copies or substantial portions - * of the Software. - */ -/* - * Authors: - * Jérôme Glisse <[email protected]> - */ -#ifndef RADEON_BUFFER_H -#define RADEON_BUFFER_H - -#include <stdio.h> - -#include "pipe/p_defines.h" -#include "util/u_inlines.h" - -#include "pipebuffer/pb_buffer.h" -#include "pipebuffer/pb_bufmgr.h" - -#include "radeon_bo.h" -#include "radeon_cs.h" - -#include "radeon_winsys.h" - -#define RADEON_PB_USAGE_VERTEX (1 << 28) -#define RADEON_PB_USAGE_DOMAIN_GTT (1 << 29) -#define RADEON_PB_USAGE_DOMAIN_VRAM (1 << 30) - -static INLINE struct pb_buffer * -radeon_pb_buffer(struct r300_winsys_buffer *buffer) -{ - return (struct pb_buffer *)buffer; -} - -static INLINE struct r300_winsys_buffer * -radeon_libdrm_winsys_buffer(struct pb_buffer *buffer) -{ - return (struct r300_winsys_buffer *)buffer; -} - -struct pb_manager * -radeon_drm_bufmgr_create(struct radeon_libdrm_winsys *rws); - -void radeon_drm_bufmgr_add_buffer(struct r300_winsys_cs *cs, - struct r300_winsys_buffer *buf, - enum r300_buffer_domain rd, - enum r300_buffer_domain wd); - -void radeon_drm_bufmgr_write_reloc(struct r300_winsys_cs *cs, - struct r300_winsys_buffer *buf, - enum r300_buffer_domain rd, - enum r300_buffer_domain wd); - -struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr, - uint32_t handle); - -void radeon_drm_bufmgr_get_tiling(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *buf, - enum r300_buffer_tiling *microtiled, - enum r300_buffer_tiling *macrotiled); - -void radeon_drm_bufmgr_set_tiling(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *buf, - enum r300_buffer_tiling microtiled, - enum r300_buffer_tiling macrotiled, - uint32_t pitch); - -void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr); - -boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf, - struct winsys_handle *whandle); - -boolean radeon_drm_bufmgr_is_buffer_referenced(struct r300_winsys_cs *cs, - struct r300_winsys_buffer *buf, - enum r300_reference_domain domain); - -void radeon_drm_bufmgr_wait(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *buf); - -void *radeon_drm_buffer_map(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *buf, - struct r300_winsys_cs *cs, - enum pipe_transfer_usage usage); - -void radeon_drm_buffer_unmap(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *buf); - -#endif diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c index 78723948d41..dc4b51747f4 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.c @@ -1,19 +1,17 @@ - -#include <sys/ioctl.h> -#include "radeon_drm.h" -#include "radeon_bo_gem.h" #include "radeon_cs_gem.h" -#include "radeon_buffer.h" +#include "radeon_drm_buffer.h" #include "util/u_hash_table.h" -#include "util/u_inlines.h" #include "util/u_memory.h" #include "util/u_simple_list.h" -#include "pipebuffer/pb_buffer.h" #include "pipebuffer/pb_bufmgr.h" #include "os/os_thread.h" -#include "radeon_winsys.h" +#include "state_tracker/drm_driver.h" + +#include <radeon_drm.h> +#include <radeon_bo_gem.h> +#include <sys/ioctl.h> struct radeon_drm_bufmgr; @@ -45,7 +43,7 @@ struct radeon_drm_bufmgr { struct pb_manager base; /* Winsys. */ - struct radeon_libdrm_winsys *rws; + struct radeon_drm_winsys *rws; /* List of mapped buffers and its mutex. */ struct radeon_drm_buffer buffer_map_list; @@ -115,7 +113,7 @@ radeon_drm_buffer_map_internal(struct pb_buffer *_buf, unsigned flags, void *flush_ctx) { struct radeon_drm_buffer *buf = radeon_drm_buffer(_buf); - struct radeon_libdrm_cs *cs = flush_ctx; + struct radeon_drm_cs *cs = flush_ctx; int write = 0; /* Note how we use radeon_bo_is_referenced_by_cs here. There are @@ -225,7 +223,7 @@ radeon_drm_bufmgr_create_buffer_from_handle_unsafe(struct pb_manager *_mgr, uint32_t handle) { struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr); - struct radeon_libdrm_winsys *rws = mgr->rws; + struct radeon_drm_winsys *rws = mgr->rws; struct radeon_drm_buffer *buf; struct radeon_bo *bo; @@ -284,7 +282,7 @@ radeon_drm_bufmgr_create_buffer(struct pb_manager *_mgr, const struct pb_desc *desc) { struct radeon_drm_bufmgr *mgr = radeon_drm_bufmgr(_mgr); - struct radeon_libdrm_winsys *rws = mgr->rws; + struct radeon_drm_winsys *rws = mgr->rws; struct radeon_drm_buffer *buf; uint32_t domain; @@ -345,7 +343,7 @@ static int handle_compare(void *key1, void *key2) } struct pb_manager * -radeon_drm_bufmgr_create(struct radeon_libdrm_winsys *rws) +radeon_drm_bufmgr_create(struct radeon_drm_winsys *rws) { struct radeon_drm_bufmgr *mgr; @@ -383,18 +381,18 @@ static struct radeon_drm_buffer *get_drm_buffer(struct pb_buffer *_buf) return buf; } -void *radeon_drm_buffer_map(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *buf, - struct r300_winsys_cs *cs, - enum pipe_transfer_usage usage) +static void *radeon_drm_buffer_map(struct r300_winsys_screen *ws, + struct r300_winsys_buffer *buf, + struct r300_winsys_cs *cs, + enum pipe_transfer_usage usage) { struct pb_buffer *_buf = radeon_pb_buffer(buf); - return pb_map(_buf, get_pb_usage_from_transfer_flags(usage), radeon_libdrm_cs(cs)); + return pb_map(_buf, get_pb_usage_from_transfer_flags(usage), radeon_drm_cs(cs)); } -void radeon_drm_buffer_unmap(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *buf) +static void radeon_drm_buffer_unmap(struct r300_winsys_screen *ws, + struct r300_winsys_buffer *buf) { struct pb_buffer *_buf = radeon_pb_buffer(buf); @@ -425,10 +423,10 @@ boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf, return TRUE; } -void radeon_drm_bufmgr_get_tiling(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *_buf, - enum r300_buffer_tiling *microtiled, - enum r300_buffer_tiling *macrotiled) +static void radeon_drm_buffer_get_tiling(struct r300_winsys_screen *ws, + struct r300_winsys_buffer *_buf, + enum r300_buffer_tiling *microtiled, + enum r300_buffer_tiling *macrotiled) { struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf)); uint32_t flags = 0, pitch; @@ -444,11 +442,11 @@ void radeon_drm_bufmgr_get_tiling(struct r300_winsys_screen *ws, *macrotiled = R300_BUFFER_TILED; } -void radeon_drm_bufmgr_set_tiling(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *_buf, - enum r300_buffer_tiling microtiled, - enum r300_buffer_tiling macrotiled, - uint32_t pitch) +static void radeon_drm_buffer_set_tiling(struct r300_winsys_screen *ws, + struct r300_winsys_buffer *_buf, + enum r300_buffer_tiling microtiled, + enum r300_buffer_tiling macrotiled, + uint32_t pitch) { struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf)); uint32_t flags = 0; @@ -465,66 +463,60 @@ void radeon_drm_bufmgr_set_tiling(struct r300_winsys_screen *ws, radeon_bo_set_tiling(buf->bo, flags, pitch); } -static uint32_t get_gem_domain(enum r300_buffer_domain domain) -{ - uint32_t res = 0; - - if (domain & R300_DOMAIN_GTT) - res |= RADEON_GEM_DOMAIN_GTT; - if (domain & R300_DOMAIN_VRAM) - res |= RADEON_GEM_DOMAIN_VRAM; - return res; -} - -void radeon_drm_bufmgr_add_buffer(struct r300_winsys_cs *rcs, - struct r300_winsys_buffer *_buf, - enum r300_buffer_domain rd, - enum r300_buffer_domain wd) +static void radeon_drm_bufmgr_add_buffer(struct r300_winsys_cs *rcs, + struct r300_winsys_cs_buffer *_buf, + enum r300_buffer_domain rd, + enum r300_buffer_domain wd) { - struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs); - struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf)); - uint32_t gem_rd = get_gem_domain(rd); - uint32_t gem_wd = get_gem_domain(wd); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); + struct radeon_bo *bo = (struct radeon_bo*)_buf; - radeon_cs_space_add_persistent_bo(cs->cs, buf->bo, gem_rd, gem_wd); + radeon_cs_space_add_persistent_bo(cs->cs, bo, rd, wd); } -void radeon_drm_bufmgr_write_reloc(struct r300_winsys_cs *rcs, - struct r300_winsys_buffer *_buf, - enum r300_buffer_domain rd, - enum r300_buffer_domain wd) +static void radeon_drm_bufmgr_write_reloc(struct r300_winsys_cs *rcs, + struct r300_winsys_cs_buffer *_buf, + enum r300_buffer_domain rd, + enum r300_buffer_domain wd) { - struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs); - struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf)); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); + struct radeon_bo *bo = (struct radeon_bo*)_buf; int retval; - uint32_t gem_rd = get_gem_domain(rd); - uint32_t gem_wd = get_gem_domain(wd); cs->cs->cdw = cs->base.cdw; - retval = radeon_cs_write_reloc(cs->cs, buf->bo, gem_rd, gem_wd, 0); + retval = radeon_cs_write_reloc(cs->cs, bo, rd, wd, 0); cs->base.cdw = cs->cs->cdw; if (retval) { fprintf(stderr, "radeon: Relocation of %p (%d, %d, %d) failed!\n", - buf, gem_rd, gem_wd, 0); + bo, rd, wd, 0); } } -boolean radeon_drm_bufmgr_is_buffer_referenced(struct r300_winsys_cs *rcs, - struct r300_winsys_buffer *_buf, +static struct r300_winsys_cs_buffer *radeon_drm_get_cs_handle( + struct r300_winsys_screen *rws, + struct r300_winsys_buffer *_buf) +{ + /* return pure radeon_bo. */ + return (struct r300_winsys_cs_buffer*) + get_drm_buffer(radeon_pb_buffer(_buf))->bo; +} + +static boolean radeon_drm_is_buffer_referenced(struct r300_winsys_cs *rcs, + struct r300_winsys_cs_buffer *_buf, enum r300_reference_domain domain) { - struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs); - struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf)); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); + struct radeon_bo *bo = (struct radeon_bo*)_buf; uint32_t tmp; if (domain & R300_REF_CS) { - if (radeon_bo_is_referenced_by_cs(buf->bo, cs->cs)) { + if (radeon_bo_is_referenced_by_cs(bo, cs->cs)) { return TRUE; } } if (domain & R300_REF_HW) { - if (radeon_bo_is_busy(buf->bo, &tmp)) { + if (radeon_bo_is_busy(bo, &tmp)) { return TRUE; } } @@ -550,10 +542,23 @@ void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr) pipe_mutex_unlock(mgr->buffer_map_list_mutex); } -void radeon_drm_bufmgr_wait(struct r300_winsys_screen *ws, - struct r300_winsys_buffer *_buf) +static void radeon_drm_buffer_wait(struct r300_winsys_screen *ws, + struct r300_winsys_buffer *_buf) { struct radeon_drm_buffer *buf = get_drm_buffer(radeon_pb_buffer(_buf)); radeon_bo_wait(buf->bo); } + +void radeon_drm_bufmgr_init_functions(struct radeon_drm_winsys *ws) +{ + ws->base.buffer_get_cs_handle = radeon_drm_get_cs_handle; + ws->base.buffer_set_tiling = radeon_drm_buffer_set_tiling; + ws->base.buffer_get_tiling = radeon_drm_buffer_get_tiling; + ws->base.buffer_map = radeon_drm_buffer_map; + ws->base.buffer_unmap = radeon_drm_buffer_unmap; + ws->base.buffer_wait = radeon_drm_buffer_wait; + ws->base.cs_is_buffer_referenced = radeon_drm_is_buffer_referenced; + ws->base.cs_add_buffer = radeon_drm_bufmgr_add_buffer; + ws->base.cs_write_reloc = radeon_drm_bufmgr_write_reloc; +} diff --git a/src/gallium/winsys/radeon/drm/radeon_drm.h b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.h index df6dd91ad54..494abdc0b48 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm.h +++ b/src/gallium/winsys/radeon/drm/radeon_drm_buffer.h @@ -1,7 +1,7 @@ -/* - * Copyright © 2009 Corbin Simpson +/* + * Copyright © 2008 Jérôme Glisse * All Rights Reserved. - * + * * Permission is hereby granted, free of charge, to any person obtaining * a copy of this software and associated documentation files (the * "Software"), to deal in the Software without restriction, including @@ -9,14 +9,14 @@ * distribute, sub license, and/or sell copies of the Software, and to * permit persons to whom the Software is furnished to do so, subject to * the following conditions: - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, - * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE + * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. * * The above copyright notice and this permission notice (including the @@ -25,19 +25,29 @@ */ /* * Authors: - * Corbin Simpson <[email protected]> + * Jérôme Glisse <[email protected]> */ -#ifndef RADEON_DRM_H -#define RADEON_DRM_H +#ifndef RADEON_DRM_BUFFER_H +#define RADEON_DRM_BUFFER_H -#include "state_tracker/drm_driver.h" +#include "radeon_winsys.h" -/* Guess at whether this chipset should use r300g. - * - * I believe that this check is valid, but I haven't been exhaustive. */ -static INLINE boolean is_r3xx(int pciid) +#define RADEON_PB_USAGE_VERTEX (1 << 28) +#define RADEON_PB_USAGE_DOMAIN_GTT (1 << 29) +#define RADEON_PB_USAGE_DOMAIN_VRAM (1 << 30) + +static INLINE struct pb_buffer * +radeon_pb_buffer(struct r300_winsys_buffer *buffer) { - return (pciid > 0x3150) && (pciid < 0x796f); + return (struct pb_buffer *)buffer; } +struct pb_manager *radeon_drm_bufmgr_create(struct radeon_drm_winsys *rws); +struct pb_buffer *radeon_drm_bufmgr_create_buffer_from_handle(struct pb_manager *_mgr, + uint32_t handle); +void radeon_drm_bufmgr_flush_maps(struct pb_manager *_mgr); +boolean radeon_drm_bufmgr_get_handle(struct pb_buffer *_buf, + struct winsys_handle *whandle); +void radeon_drm_bufmgr_init_functions(struct radeon_drm_winsys *ws); + #endif diff --git a/src/gallium/winsys/radeon/drm/radeon_drm.c b/src/gallium/winsys/radeon/drm/radeon_drm_common.c index 86d4f949697..6bc6244115c 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm.c +++ b/src/gallium/winsys/radeon/drm/radeon_drm_common.c @@ -29,30 +29,21 @@ * Joakim Sindholt <[email protected]> */ -#include "radeon_drm.h" -#include "radeon_r300.h" -#include "radeon_buffer.h" +#include "radeon_winsys.h" +#include "radeon_drm_buffer.h" #include "radeon_drm_public.h" -#include "r300_winsys.h" - +#include "pipebuffer/pb_bufmgr.h" #include "util/u_memory.h" -#include "xf86drm.h" - -static struct radeon_libdrm_winsys * -radeon_winsys_create(int fd) -{ - struct radeon_libdrm_winsys *rws; +#include "state_tracker/drm_driver.h" - rws = CALLOC_STRUCT(radeon_libdrm_winsys); - if (rws == NULL) { - return NULL; - } +#include <radeon_drm.h> +#include <radeon_bo_gem.h> +#include <radeon_cs_gem.h> +#include <xf86drm.h> +#include <stdio.h> - rws->fd = fd; - return rws; -} /* Enable/disable Hyper-Z access. Return TRUE on success. */ static boolean radeon_set_hyperz_access(int fd, boolean enable) @@ -80,7 +71,7 @@ static boolean radeon_set_hyperz_access(int fd, boolean enable) } /* Helper function to do the ioctls needed for setup and init. */ -static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys) +static void do_ioctls(struct radeon_drm_winsys *winsys) { struct drm_radeon_gem_info gem_info = {0}; struct drm_radeon_info info = {0}; @@ -107,7 +98,7 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys) * (see radeon_gem_info_ioctl in radeon_gem.c) but that's alright because * we don't actually use the info for anything yet. */ - version = drmGetVersion(fd); + version = drmGetVersion(winsys->fd); if (version->version_major != 2) { fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is " "only compatible with 2.x.x\n", __FUNCTION__, @@ -132,7 +123,7 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys) version->version_minor >= 6); info.request = RADEON_INFO_DEVICE_ID; - retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); + retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info)); if (retval) { fprintf(stderr, "%s: Failed to get PCI ID, " "error number %d\n", __FUNCTION__, retval); @@ -141,7 +132,7 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys) winsys->pci_id = target; info.request = RADEON_INFO_NUM_GB_PIPES; - retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); + retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info)); if (retval) { fprintf(stderr, "%s: Failed to get GB pipe count, " "error number %d\n", __FUNCTION__, retval); @@ -150,7 +141,7 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys) winsys->gb_pipes = target; info.request = RADEON_INFO_NUM_Z_PIPES; - retval = drmCommandWriteRead(fd, DRM_RADEON_INFO, &info, sizeof(info)); + retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_INFO, &info, sizeof(info)); if (retval) { fprintf(stderr, "%s: Failed to get Z pipe count, " "error number %d\n", __FUNCTION__, retval); @@ -158,9 +149,9 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys) } winsys->z_pipes = target; - winsys->hyperz = radeon_set_hyperz_access(fd, TRUE); + winsys->hyperz = radeon_set_hyperz_access(winsys->fd, TRUE); - retval = drmCommandWriteRead(fd, DRM_RADEON_GEM_INFO, + retval = drmCommandWriteRead(winsys->fd, DRM_RADEON_GEM_INFO, &gem_info, sizeof(gem_info)); if (retval) { fprintf(stderr, "%s: Failed to get MM info, error number %d\n", @@ -184,29 +175,65 @@ static void do_ioctls(int fd, struct radeon_libdrm_winsys* winsys) drmFreeVersion(version); } -/* Create a pipe_screen. */ -struct r300_winsys_screen* r300_drm_winsys_screen_create(int drmFB) +static void radeon_winsys_destroy(struct r300_winsys_screen *rws) +{ + struct radeon_drm_winsys *ws = (struct radeon_drm_winsys*)rws; + + ws->cman->destroy(ws->cman); + ws->kman->destroy(ws->kman); + + radeon_bo_manager_gem_dtor(ws->bom); + radeon_cs_manager_gem_dtor(ws->csm); + FREE(rws); +} + +struct r300_winsys_screen *r300_drm_winsys_screen_create(int fd) { - struct radeon_libdrm_winsys* rws; - boolean ret; - - rws = radeon_winsys_create(drmFB); - if (!rws) - return NULL; - - do_ioctls(drmFB, rws); - - /* The state tracker can organize a softpipe fallback if no hw - * driver is found. - */ - if (is_r3xx(rws->pci_id)) { - ret = radeon_setup_winsys(drmFB, rws); - if (ret == FALSE) - goto fail; - return &rws->base; + struct radeon_drm_winsys *ws = CALLOC_STRUCT(radeon_drm_winsys); + if (!ws) { + return NULL; + } + + ws->fd = fd; + do_ioctls(ws); + + if (!is_r3xx(ws->pci_id)) { + goto fail; } + /* Create managers. */ + ws->bom = radeon_bo_manager_gem_ctor(fd); + if (!ws->bom) + goto fail; + ws->csm = radeon_cs_manager_gem_ctor(fd); + if (!ws->csm) + goto fail; + ws->kman = radeon_drm_bufmgr_create(ws); + if (!ws->kman) + goto fail; + ws->cman = pb_cache_manager_create(ws->kman, 1000000); + if (!ws->cman) + goto fail; + + /* Set functions. */ + ws->base.destroy = radeon_winsys_destroy; + + radeon_drm_bufmgr_init_functions(ws); + radeon_winsys_init_functions(ws); + + return &ws->base; + fail: - FREE(rws); + if (ws->bom) + radeon_bo_manager_gem_dtor(ws->bom); + if (ws->csm) + radeon_cs_manager_gem_dtor(ws->csm); + + if (ws->cman) + ws->cman->destroy(ws->cman); + if (ws->kman) + ws->kman->destroy(ws->kman); + + FREE(ws); return NULL; } diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_public.h b/src/gallium/winsys/radeon/drm/radeon_drm_public.h index 0d96ae8c470..3a208cdd4c4 100644 --- a/src/gallium/winsys/radeon/drm/radeon_drm_public.h +++ b/src/gallium/winsys/radeon/drm/radeon_drm_public.h @@ -1,9 +1,222 @@ - #ifndef RADEON_DRM_PUBLIC_H #define RADEON_DRM_PUBLIC_H +#include "pipe/p_defines.h" + struct r300_winsys_screen; -struct r300_winsys_screen *r300_drm_winsys_screen_create(int drmFD); +struct r300_winsys_screen *r300_drm_winsys_screen_create(int fd); + +static INLINE boolean is_r3xx(int pciid) +{ + switch (pciid) { + case 0x4144: /* PCI_CHIP_R300_AD */ + case 0x4145: /* PCI_CHIP_R300_AE */ + case 0x4146: /* PCI_CHIP_R300_AF */ + case 0x4147: /* PCI_CHIP_R300_AG */ + case 0x4E44: /* PCI_CHIP_R300_ND */ + case 0x4E45: /* PCI_CHIP_R300_NE */ + case 0x4E46: /* PCI_CHIP_R300_NF */ + case 0x4E47: /* PCI_CHIP_R300_NG */ + case 0x4E48: /* PCI_CHIP_R350_NH */ + case 0x4E49: /* PCI_CHIP_R350_NI */ + case 0x4E4B: /* PCI_CHIP_R350_NK */ + case 0x4148: /* PCI_CHIP_R350_AH */ + case 0x4149: /* PCI_CHIP_R350_AI */ + case 0x414A: /* PCI_CHIP_R350_AJ */ + case 0x414B: /* PCI_CHIP_R350_AK */ + case 0x4E4A: /* PCI_CHIP_R360_NJ */ + case 0x4150: /* PCI_CHIP_RV350_AP */ + case 0x4151: /* PCI_CHIP_RV350_AQ */ + case 0x4152: /* PCI_CHIP_RV350_AR */ + case 0x4153: /* PCI_CHIP_RV350_AS */ + case 0x4154: /* PCI_CHIP_RV350_AT */ + case 0x4155: /* PCI_CHIP_RV350_AU */ + case 0x4156: /* PCI_CHIP_RV350_AV */ + case 0x4E50: /* PCI_CHIP_RV350_NP */ + case 0x4E51: /* PCI_CHIP_RV350_NQ */ + case 0x4E52: /* PCI_CHIP_RV350_NR */ + case 0x4E53: /* PCI_CHIP_RV350_NS */ + case 0x4E54: /* PCI_CHIP_RV350_NT */ + case 0x4E56: /* PCI_CHIP_RV350_NV */ + case 0x5460: /* PCI_CHIP_RV370_5460 */ + case 0x5462: /* PCI_CHIP_RV370_5462 */ + case 0x5464: /* PCI_CHIP_RV370_5464 */ + case 0x5B60: /* PCI_CHIP_RV370_5B60 */ + case 0x5B62: /* PCI_CHIP_RV370_5B62 */ + case 0x5B63: /* PCI_CHIP_RV370_5B63 */ + case 0x5B64: /* PCI_CHIP_RV370_5B64 */ + case 0x5B65: /* PCI_CHIP_RV370_5B65 */ + case 0x3150: /* PCI_CHIP_RV380_3150 */ + case 0x3152: /* PCI_CHIP_RV380_3152 */ + case 0x3154: /* PCI_CHIP_RV380_3154 */ + case 0x3155: /* PCI_CHIP_RV380_3155 */ + case 0x3E50: /* PCI_CHIP_RV380_3E50 */ + case 0x3E54: /* PCI_CHIP_RV380_3E54 */ + case 0x4A48: /* PCI_CHIP_R420_JH */ + case 0x4A49: /* PCI_CHIP_R420_JI */ + case 0x4A4A: /* PCI_CHIP_R420_JJ */ + case 0x4A4B: /* PCI_CHIP_R420_JK */ + case 0x4A4C: /* PCI_CHIP_R420_JL */ + case 0x4A4D: /* PCI_CHIP_R420_JM */ + case 0x4A4E: /* PCI_CHIP_R420_JN */ + case 0x4A4F: /* PCI_CHIP_R420_JO */ + case 0x4A50: /* PCI_CHIP_R420_JP */ + case 0x4A54: /* PCI_CHIP_R420_JT */ + case 0x5548: /* PCI_CHIP_R423_UH */ + case 0x5549: /* PCI_CHIP_R423_UI */ + case 0x554A: /* PCI_CHIP_R423_UJ */ + case 0x554B: /* PCI_CHIP_R423_UK */ + case 0x5550: /* PCI_CHIP_R423_5550 */ + case 0x5551: /* PCI_CHIP_R423_UQ */ + case 0x5552: /* PCI_CHIP_R423_UR */ + case 0x5554: /* PCI_CHIP_R423_UT */ + case 0x5D57: /* PCI_CHIP_R423_5D57 */ + case 0x554C: /* PCI_CHIP_R430_554C */ + case 0x554D: /* PCI_CHIP_R430_554D */ + case 0x554E: /* PCI_CHIP_R430_554E */ + case 0x554F: /* PCI_CHIP_R430_554F */ + case 0x5D48: /* PCI_CHIP_R430_5D48 */ + case 0x5D49: /* PCI_CHIP_R430_5D49 */ + case 0x5D4A: /* PCI_CHIP_R430_5D4A */ + case 0x5D4C: /* PCI_CHIP_R480_5D4C */ + case 0x5D4D: /* PCI_CHIP_R480_5D4D */ + case 0x5D4E: /* PCI_CHIP_R480_5D4E */ + case 0x5D4F: /* PCI_CHIP_R480_5D4F */ + case 0x5D50: /* PCI_CHIP_R480_5D50 */ + case 0x5D52: /* PCI_CHIP_R480_5D52 */ + case 0x4B49: /* PCI_CHIP_R481_4B49 */ + case 0x4B4A: /* PCI_CHIP_R481_4B4A */ + case 0x4B4B: /* PCI_CHIP_R481_4B4B */ + case 0x4B4C: /* PCI_CHIP_R481_4B4C */ + case 0x564A: /* PCI_CHIP_RV410_564A */ + case 0x564B: /* PCI_CHIP_RV410_564B */ + case 0x564F: /* PCI_CHIP_RV410_564F */ + case 0x5652: /* PCI_CHIP_RV410_5652 */ + case 0x5653: /* PCI_CHIP_RV410_5653 */ + case 0x5657: /* PCI_CHIP_RV410_5657 */ + case 0x5E48: /* PCI_CHIP_RV410_5E48 */ + case 0x5E4A: /* PCI_CHIP_RV410_5E4A */ + case 0x5E4B: /* PCI_CHIP_RV410_5E4B */ + case 0x5E4C: /* PCI_CHIP_RV410_5E4C */ + case 0x5E4D: /* PCI_CHIP_RV410_5E4D */ + case 0x5E4F: /* PCI_CHIP_RV410_5E4F */ + case 0x5A41: /* PCI_CHIP_RS400_5A41 */ + case 0x5A42: /* PCI_CHIP_RS400_5A42 */ + case 0x5A61: /* PCI_CHIP_RC410_5A61 */ + case 0x5A62: /* PCI_CHIP_RC410_5A62 */ + case 0x5954: /* PCI_CHIP_RS480_5954 */ + case 0x5955: /* PCI_CHIP_RS480_5955 */ + case 0x5974: /* PCI_CHIP_RS482_5974 */ + case 0x5975: /* PCI_CHIP_RS482_5975 */ + case 0x7100: /* PCI_CHIP_R520_7100 */ + case 0x7101: /* PCI_CHIP_R520_7101 */ + case 0x7102: /* PCI_CHIP_R520_7102 */ + case 0x7103: /* PCI_CHIP_R520_7103 */ + case 0x7104: /* PCI_CHIP_R520_7104 */ + case 0x7105: /* PCI_CHIP_R520_7105 */ + case 0x7106: /* PCI_CHIP_R520_7106 */ + case 0x7108: /* PCI_CHIP_R520_7108 */ + case 0x7109: /* PCI_CHIP_R520_7109 */ + case 0x710A: /* PCI_CHIP_R520_710A */ + case 0x710B: /* PCI_CHIP_R520_710B */ + case 0x710C: /* PCI_CHIP_R520_710C */ + case 0x710E: /* PCI_CHIP_R520_710E */ + case 0x710F: /* PCI_CHIP_R520_710F */ + case 0x7140: /* PCI_CHIP_RV515_7140 */ + case 0x7141: /* PCI_CHIP_RV515_7141 */ + case 0x7142: /* PCI_CHIP_RV515_7142 */ + case 0x7143: /* PCI_CHIP_RV515_7143 */ + case 0x7144: /* PCI_CHIP_RV515_7144 */ + case 0x7145: /* PCI_CHIP_RV515_7145 */ + case 0x7146: /* PCI_CHIP_RV515_7146 */ + case 0x7147: /* PCI_CHIP_RV515_7147 */ + case 0x7149: /* PCI_CHIP_RV515_7149 */ + case 0x714A: /* PCI_CHIP_RV515_714A */ + case 0x714B: /* PCI_CHIP_RV515_714B */ + case 0x714C: /* PCI_CHIP_RV515_714C */ + case 0x714D: /* PCI_CHIP_RV515_714D */ + case 0x714E: /* PCI_CHIP_RV515_714E */ + case 0x714F: /* PCI_CHIP_RV515_714F */ + case 0x7151: /* PCI_CHIP_RV515_7151 */ + case 0x7152: /* PCI_CHIP_RV515_7152 */ + case 0x7153: /* PCI_CHIP_RV515_7153 */ + case 0x715E: /* PCI_CHIP_RV515_715E */ + case 0x715F: /* PCI_CHIP_RV515_715F */ + case 0x7180: /* PCI_CHIP_RV515_7180 */ + case 0x7181: /* PCI_CHIP_RV515_7181 */ + case 0x7183: /* PCI_CHIP_RV515_7183 */ + case 0x7186: /* PCI_CHIP_RV515_7186 */ + case 0x7187: /* PCI_CHIP_RV515_7187 */ + case 0x7188: /* PCI_CHIP_RV515_7188 */ + case 0x718A: /* PCI_CHIP_RV515_718A */ + case 0x718B: /* PCI_CHIP_RV515_718B */ + case 0x718C: /* PCI_CHIP_RV515_718C */ + case 0x718D: /* PCI_CHIP_RV515_718D */ + case 0x718F: /* PCI_CHIP_RV515_718F */ + case 0x7193: /* PCI_CHIP_RV515_7193 */ + case 0x7196: /* PCI_CHIP_RV515_7196 */ + case 0x719B: /* PCI_CHIP_RV515_719B */ + case 0x719F: /* PCI_CHIP_RV515_719F */ + case 0x7200: /* PCI_CHIP_RV515_7200 */ + case 0x7210: /* PCI_CHIP_RV515_7210 */ + case 0x7211: /* PCI_CHIP_RV515_7211 */ + case 0x71C0: /* PCI_CHIP_RV530_71C0 */ + case 0x71C1: /* PCI_CHIP_RV530_71C1 */ + case 0x71C2: /* PCI_CHIP_RV530_71C2 */ + case 0x71C3: /* PCI_CHIP_RV530_71C3 */ + case 0x71C4: /* PCI_CHIP_RV530_71C4 */ + case 0x71C5: /* PCI_CHIP_RV530_71C5 */ + case 0x71C6: /* PCI_CHIP_RV530_71C6 */ + case 0x71C7: /* PCI_CHIP_RV530_71C7 */ + case 0x71CD: /* PCI_CHIP_RV530_71CD */ + case 0x71CE: /* PCI_CHIP_RV530_71CE */ + case 0x71D2: /* PCI_CHIP_RV530_71D2 */ + case 0x71D4: /* PCI_CHIP_RV530_71D4 */ + case 0x71D5: /* PCI_CHIP_RV530_71D5 */ + case 0x71D6: /* PCI_CHIP_RV530_71D6 */ + case 0x71DA: /* PCI_CHIP_RV530_71DA */ + case 0x71DE: /* PCI_CHIP_RV530_71DE */ + case 0x7281: /* PCI_CHIP_RV560_7281 */ + case 0x7283: /* PCI_CHIP_RV560_7283 */ + case 0x7287: /* PCI_CHIP_RV560_7287 */ + case 0x7290: /* PCI_CHIP_RV560_7290 */ + case 0x7291: /* PCI_CHIP_RV560_7291 */ + case 0x7293: /* PCI_CHIP_RV560_7293 */ + case 0x7297: /* PCI_CHIP_RV560_7297 */ + case 0x7280: /* PCI_CHIP_RV570_7280 */ + case 0x7288: /* PCI_CHIP_RV570_7288 */ + case 0x7289: /* PCI_CHIP_RV570_7289 */ + case 0x728B: /* PCI_CHIP_RV570_728B */ + case 0x728C: /* PCI_CHIP_RV570_728C */ + case 0x7240: /* PCI_CHIP_R580_7240 */ + case 0x7243: /* PCI_CHIP_R580_7243 */ + case 0x7244: /* PCI_CHIP_R580_7244 */ + case 0x7245: /* PCI_CHIP_R580_7245 */ + case 0x7246: /* PCI_CHIP_R580_7246 */ + case 0x7247: /* PCI_CHIP_R580_7247 */ + case 0x7248: /* PCI_CHIP_R580_7248 */ + case 0x7249: /* PCI_CHIP_R580_7249 */ + case 0x724A: /* PCI_CHIP_R580_724A */ + case 0x724B: /* PCI_CHIP_R580_724B */ + case 0x724C: /* PCI_CHIP_R580_724C */ + case 0x724D: /* PCI_CHIP_R580_724D */ + case 0x724E: /* PCI_CHIP_R580_724E */ + case 0x724F: /* PCI_CHIP_R580_724F */ + case 0x7284: /* PCI_CHIP_R580_7284 */ + case 0x793F: /* PCI_CHIP_RS600_793F */ + case 0x7941: /* PCI_CHIP_RS600_7941 */ + case 0x7942: /* PCI_CHIP_RS600_7942 */ + case 0x791E: /* PCI_CHIP_RS690_791E */ + case 0x791F: /* PCI_CHIP_RS690_791F */ + case 0x796C: /* PCI_CHIP_RS740_796C */ + case 0x796D: /* PCI_CHIP_RS740_796D */ + case 0x796E: /* PCI_CHIP_RS740_796E */ + case 0x796F: /* PCI_CHIP_RS740_796F */ + return TRUE; + default: + return FALSE; + } +} #endif diff --git a/src/gallium/winsys/radeon/drm/radeon_r300.c b/src/gallium/winsys/radeon/drm/radeon_r300.c index 420522f5c1f..9f59b3de461 100644 --- a/src/gallium/winsys/radeon/drm/radeon_r300.c +++ b/src/gallium/winsys/radeon/drm/radeon_r300.c @@ -20,15 +20,14 @@ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE * USE OR OTHER DEALINGS IN THE SOFTWARE. */ -#include "radeon_r300.h" -#include "radeon_buffer.h" +#include "radeon_drm_buffer.h" + +#include "util/u_memory.h" +#include "pipebuffer/pb_bufmgr.h" -#include "radeon_bo_gem.h" #include "radeon_cs_gem.h" #include "state_tracker/drm_driver.h" -#include "util/u_memory.h" - static unsigned get_pb_usage_from_create_flags(unsigned bind, unsigned usage, enum r300_buffer_domain domain) { @@ -73,7 +72,7 @@ radeon_r300_winsys_buffer_create(struct r300_winsys_screen *rws, unsigned usage, enum r300_buffer_domain domain) { - struct radeon_libdrm_winsys *ws = radeon_libdrm_winsys(rws); + struct radeon_drm_winsys *ws = radeon_drm_winsys(rws); struct pb_desc desc; struct pb_manager *provider; struct pb_buffer *buffer; @@ -92,7 +91,7 @@ radeon_r300_winsys_buffer_create(struct r300_winsys_screen *rws, if (!buffer) return NULL; - return radeon_libdrm_winsys_buffer(buffer); + return (struct r300_winsys_buffer*)buffer; } static void radeon_r300_winsys_buffer_reference(struct r300_winsys_screen *rws, @@ -104,7 +103,7 @@ static void radeon_r300_winsys_buffer_reference(struct r300_winsys_screen *rws, pb_reference(&_dst, _src); - *pdst = radeon_libdrm_winsys_buffer(_dst); + *pdst = (struct r300_winsys_buffer*)_dst; } static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r300_winsys_screen *rws, @@ -112,7 +111,7 @@ static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r unsigned *stride, unsigned *size) { - struct radeon_libdrm_winsys *ws = radeon_libdrm_winsys(rws); + struct radeon_drm_winsys *ws = radeon_drm_winsys(rws); struct pb_buffer *_buf; _buf = radeon_drm_bufmgr_create_buffer_from_handle(ws->kman, whandle->handle); @@ -122,7 +121,7 @@ static struct r300_winsys_buffer *radeon_r300_winsys_buffer_from_handle(struct r if (size) *size = _buf->base.size; - return radeon_libdrm_winsys_buffer(_buf); + return (struct r300_winsys_buffer*)_buf; } static boolean radeon_r300_winsys_buffer_get_handle(struct r300_winsys_screen *rws, @@ -139,7 +138,7 @@ static void radeon_r300_winsys_cs_set_flush(struct r300_winsys_cs *rcs, void (*flush)(void *), void *user) { - struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); cs->flush_cs = flush; cs->flush_data = user; radeon_cs_space_set_flush(cs->cs, flush, user); @@ -147,20 +146,20 @@ static void radeon_r300_winsys_cs_set_flush(struct r300_winsys_cs *rcs, static boolean radeon_r300_winsys_cs_validate(struct r300_winsys_cs *rcs) { - struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); return radeon_cs_space_check(cs->cs) >= 0; } static void radeon_r300_winsys_cs_reset_buffers(struct r300_winsys_cs *rcs) { - struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); radeon_cs_space_reset_bos(cs->cs); } static void radeon_r300_winsys_cs_flush(struct r300_winsys_cs *rcs) { - struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); int retval; /* Don't flush a zero-sized CS. */ @@ -190,15 +189,14 @@ static void radeon_r300_winsys_cs_flush(struct r300_winsys_cs *rcs) * spinning through one CS while another one is being filled. */ radeon_cs_erase(cs->cs); - cs->base.ptr = cs->cs->packets; + cs->base.buf = cs->cs->packets; cs->base.cdw = cs->cs->cdw; - cs->base.ndw = cs->cs->ndw; } static uint32_t radeon_get_value(struct r300_winsys_screen *rws, enum r300_value_id id) { - struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws; + struct radeon_drm_winsys *ws = (struct radeon_drm_winsys *)rws; switch(id) { case R300_VID_PCI_ID: @@ -221,8 +219,8 @@ static uint32_t radeon_get_value(struct r300_winsys_screen *rws, static struct r300_winsys_cs *radeon_r300_winsys_cs_create(struct r300_winsys_screen *rws) { - struct radeon_libdrm_winsys *ws = radeon_libdrm_winsys(rws); - struct radeon_libdrm_cs *cs = CALLOC_STRUCT(radeon_libdrm_cs); + struct radeon_drm_winsys *ws = radeon_drm_winsys(rws); + struct radeon_drm_cs *cs = CALLOC_STRUCT(radeon_drm_cs); if (!cs) return NULL; @@ -240,83 +238,29 @@ static struct r300_winsys_cs *radeon_r300_winsys_cs_create(struct r300_winsys_sc RADEON_GEM_DOMAIN_VRAM, ws->vram_size); cs->ws = ws; - cs->base.ptr = cs->cs->packets; + cs->base.buf = cs->cs->packets; cs->base.cdw = cs->cs->cdw; - cs->base.ndw = cs->cs->ndw; return &cs->base; } static void radeon_r300_winsys_cs_destroy(struct r300_winsys_cs *rcs) { - struct radeon_libdrm_cs *cs = radeon_libdrm_cs(rcs); + struct radeon_drm_cs *cs = radeon_drm_cs(rcs); radeon_cs_destroy(cs->cs); FREE(cs); } -static void radeon_winsys_destroy(struct r300_winsys_screen *rws) -{ - struct radeon_libdrm_winsys *ws = (struct radeon_libdrm_winsys *)rws; - - ws->cman->destroy(ws->cman); - ws->kman->destroy(ws->kman); - - radeon_bo_manager_gem_dtor(ws->bom); - radeon_cs_manager_gem_dtor(ws->csm); - - FREE(rws); -} - -boolean radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* ws) +void radeon_winsys_init_functions(struct radeon_drm_winsys *ws) { - ws->csm = radeon_cs_manager_gem_ctor(fd); - if (!ws->csm) - goto fail; - ws->bom = radeon_bo_manager_gem_ctor(fd); - if (!ws->bom) - goto fail; - ws->kman = radeon_drm_bufmgr_create(ws); - if (!ws->kman) - goto fail; - - ws->cman = pb_cache_manager_create(ws->kman, 100000); - if (!ws->cman) - goto fail; - - ws->base.destroy = radeon_winsys_destroy; ws->base.get_value = radeon_get_value; - ws->base.buffer_create = radeon_r300_winsys_buffer_create; - ws->base.buffer_set_tiling = radeon_drm_bufmgr_set_tiling; - ws->base.buffer_get_tiling = radeon_drm_bufmgr_get_tiling; - ws->base.buffer_map = radeon_drm_buffer_map; - ws->base.buffer_unmap = radeon_drm_buffer_unmap; - ws->base.buffer_wait = radeon_drm_bufmgr_wait; ws->base.buffer_reference = radeon_r300_winsys_buffer_reference; ws->base.buffer_from_handle = radeon_r300_winsys_buffer_from_handle; ws->base.buffer_get_handle = radeon_r300_winsys_buffer_get_handle; - ws->base.cs_create = radeon_r300_winsys_cs_create; ws->base.cs_destroy = radeon_r300_winsys_cs_destroy; - ws->base.cs_add_buffer = radeon_drm_bufmgr_add_buffer; ws->base.cs_validate = radeon_r300_winsys_cs_validate; - ws->base.cs_write_reloc = radeon_drm_bufmgr_write_reloc; ws->base.cs_flush = radeon_r300_winsys_cs_flush; ws->base.cs_reset_buffers = radeon_r300_winsys_cs_reset_buffers; ws->base.cs_set_flush = radeon_r300_winsys_cs_set_flush; - ws->base.cs_is_buffer_referenced = radeon_drm_bufmgr_is_buffer_referenced; - return TRUE; - -fail: - if (ws->csm) - radeon_cs_manager_gem_dtor(ws->csm); - - if (ws->bom) - radeon_bo_manager_gem_dtor(ws->bom); - - if (ws->cman) - ws->cman->destroy(ws->cman); - if (ws->kman) - ws->kman->destroy(ws->kman); - - return FALSE; } diff --git a/src/gallium/winsys/radeon/drm/radeon_r300.h b/src/gallium/winsys/radeon/drm/radeon_r300.h deleted file mode 100644 index 2703464ad8f..00000000000 --- a/src/gallium/winsys/radeon/drm/radeon_r300.h +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright 2008 Corbin Simpson <[email protected]> - * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * on the rights to use, copy, modify, merge, publish, distribute, sub - * license, and/or sell copies of the Software, and to permit persons to whom - * the Software is furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice (including the next - * paragraph) shall be included in all copies or substantial portions of the - * Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL - * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, - * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR - * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE - * USE OR OTHER DEALINGS IN THE SOFTWARE. */ - -#ifndef RADEON_R300_H -#define RADEON_R300_H - -#include "radeon_winsys.h" - -boolean radeon_setup_winsys(int fd, struct radeon_libdrm_winsys* winsys); - -#endif /* RADEON_R300_H */ diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h index 6f4aa4bce30..81da1a25e0f 100644 --- a/src/gallium/winsys/radeon/drm/radeon_winsys.h +++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h @@ -32,63 +32,37 @@ #include "r300_winsys.h" -struct radeon_libdrm_winsys { - /* Parent class. */ +struct radeon_drm_winsys { struct r300_winsys_screen base; - struct pb_manager *kman; + int fd; /* DRM file descriptor */ + struct radeon_bo_manager *bom; /* Radeon BO manager. */ + struct pb_manager *kman; struct pb_manager *cman; - /* PCI ID */ - uint32_t pci_id; - - /* GB pipe count */ - uint32_t gb_pipes; - - /* Z pipe count (rv530 only) */ - uint32_t z_pipes; - - /* GART size. */ - uint32_t gart_size; - - /* VRAM size. */ - uint32_t vram_size; - - /* Square tiling support. */ - boolean squaretiling; - - /* DRM 2.3.0 - * - R500 VAP regs - * - MSPOS regs - * - Fixed texture 3D size calculation - */ + uint32_t pci_id; /* PCI ID */ + uint32_t gb_pipes; /* GB pipe count */ + uint32_t z_pipes; /* Z pipe count (rv530 only) */ + uint32_t gart_size; /* GART size. */ + uint32_t vram_size; /* VRAM size. */ + boolean squaretiling; /* Square tiling support. */ + /* DRM 2.3.0 (R500 VAP regs, MSPOS regs, fixed tex3D size checking) */ boolean drm_2_3_0; - - /* DRM 2.6.0 - * - Hyper-Z - * - GB_Z_PEQ_CONFIG allowed on rv350->r4xx, we should initialize it - */ + /* DRM 2.6.0 (Hyper-Z, GB_Z_PEQ_CONFIG allowed on rv350->r4xx) */ boolean drm_2_6_0; - - /* hyperz user */ + /* Hyper-Z user */ boolean hyperz; - /* DRM FD */ - int fd; - - /* Radeon BO manager. */ - struct radeon_bo_manager *bom; - /* Radeon CS manager. */ struct radeon_cs_manager *csm; }; -struct radeon_libdrm_cs { +struct radeon_drm_cs { struct r300_winsys_cs base; /* The winsys. */ - struct radeon_libdrm_winsys *ws; + struct radeon_drm_winsys *ws; /* The libdrm command stream. */ struct radeon_cs *cs; @@ -98,16 +72,18 @@ struct radeon_libdrm_cs { void *flush_data; }; -static INLINE struct radeon_libdrm_cs * -radeon_libdrm_cs(struct r300_winsys_cs *base) +static INLINE struct radeon_drm_cs * +radeon_drm_cs(struct r300_winsys_cs *base) { - return (struct radeon_libdrm_cs*)base; + return (struct radeon_drm_cs*)base; } -static INLINE struct radeon_libdrm_winsys * -radeon_libdrm_winsys(struct r300_winsys_screen *base) +static INLINE struct radeon_drm_winsys * +radeon_drm_winsys(struct r300_winsys_screen *base) { - return (struct radeon_libdrm_winsys*)base; + return (struct radeon_drm_winsys*)base; } +void radeon_winsys_init_functions(struct radeon_drm_winsys *ws); + #endif diff --git a/src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c b/src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c index bc2623e7b77..8f9a90858de 100644 --- a/src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c +++ b/src/gallium/winsys/sw/wrapper/wrapper_sw_winsys.c @@ -93,9 +93,9 @@ wsw_dt_get_stride(struct wrapper_sw_displaytarget *wdt, unsigned *stride) struct pipe_resource *tex = wdt->tex; struct pipe_transfer *tr; - tr = pipe_get_transfer(pipe, tex, 0, 0, 0, - PIPE_TRANSFER_READ_WRITE, - 0, 0, wdt->width, wdt->height); + tr = pipe_get_transfer(pipe, tex, 0, 0, + PIPE_TRANSFER_READ_WRITE, + 0, 0, wdt->width, wdt->height); if (!tr) return FALSE; @@ -149,6 +149,8 @@ wsw_dt_create(struct sw_winsys *ws, templ.target = wsw->target; templ.width0 = width; templ.height0 = height; + templ.depth0 = 1; + templ.array_size = 1; templ.format = format; templ.bind = bind; @@ -204,9 +206,9 @@ wsw_dt_map(struct sw_winsys *ws, assert(!wdt->transfer); - tr = pipe_get_transfer(pipe, tex, 0, 0, 0, - PIPE_TRANSFER_READ_WRITE, - 0, 0, wdt->width, wdt->height); + tr = pipe_get_transfer(pipe, tex, 0, 0, + PIPE_TRANSFER_READ_WRITE, + 0, 0, wdt->width, wdt->height); if (!tr) return NULL; |