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-rw-r--r--src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c2
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
index c3dfda53f09..db0087c094e 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c
@@ -465,6 +465,8 @@ static uint64_t amdgpu_query_value(struct radeon_winsys *rws,
case RADEON_GPU_RESET_COUNTER:
assert(0);
return 0;
+ case RADEON_CS_THREAD_TIME:
+ return util_queue_get_thread_time_nano(&ws->cs_queue, 0);
}
return 0;
}
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index cacd683879b..bdcf1946595 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -669,6 +669,8 @@ static uint64_t radeon_query_value(struct radeon_winsys *rws,
radeon_get_drm_value(ws->fd, RADEON_INFO_GPU_RESET_COUNTER,
"gpu-reset-counter", (uint32_t*)&retval);
return retval;
+ case RADEON_CS_THREAD_TIME:
+ return util_queue_get_thread_time_nano(&ws->cs_queue, 0);
}
return 0;
}