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-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_bo.c25
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_bo.h1
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_cs.c2
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.c12
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_drm_winsys.h2
-rw-r--r--src/gallium/winsys/radeon/drm/radeon_winsys.h7
6 files changed, 43 insertions, 6 deletions
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
index d06bb344c73..73f8d385d7b 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.c
@@ -477,6 +477,10 @@ const struct pb_vtbl radeon_bo_vtbl = {
radeon_bo_get_base_buffer,
};
+#ifndef RADEON_GEM_GTT_WC
+#define RADEON_GEM_GTT_WC (1 << 2)
+#endif
+
static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
pb_size size,
const struct pb_desc *desc)
@@ -497,6 +501,10 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
args.size = size;
args.alignment = desc->alignment;
args.initial_domain = rdesc->initial_domains;
+ args.flags = 0;
+
+ if (rdesc->flags & RADEON_FLAG_GTT_WC)
+ args.flags |= RADEON_GEM_GTT_WC;
if (drmCommandWriteRead(rws->fd, DRM_RADEON_GEM_CREATE,
&args, sizeof(args))) {
@@ -504,6 +512,7 @@ static struct pb_buffer *radeon_bomgr_create_bo(struct pb_manager *_mgr,
fprintf(stderr, "radeon: size : %d bytes\n", size);
fprintf(stderr, "radeon: alignment : %d bytes\n", desc->alignment);
fprintf(stderr, "radeon: domains : %d\n", args.initial_domain);
+ fprintf(stderr, "radeon: flags : %d\n", args.flags);
return NULL;
}
@@ -784,7 +793,8 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
unsigned size,
unsigned alignment,
boolean use_reusable_pool,
- enum radeon_bo_domain domain)
+ enum radeon_bo_domain domain,
+ enum radeon_bo_flag flags)
{
struct radeon_drm_winsys *ws = radeon_drm_winsys(rws);
struct radeon_bomgr *mgr = radeon_bomgr(ws->kman);
@@ -798,13 +808,20 @@ radeon_winsys_bo_create(struct radeon_winsys *rws,
/* Additional criteria for the cache manager. */
desc.base.usage = domain;
desc.initial_domains = domain;
+ desc.flags = flags;
/* Assign a buffer manager. */
if (use_reusable_pool) {
- if (domain == RADEON_DOMAIN_VRAM)
- provider = ws->cman_vram;
- else
+ if (domain == RADEON_DOMAIN_VRAM) {
+ if (flags & RADEON_FLAG_GTT_WC)
+ provider = ws->cman_vram_gtt_wc;
+ else
+ provider = ws->cman_vram;
+ } else if (flags & RADEON_FLAG_GTT_WC) {
+ provider = ws->cman_gtt_wc;
+ } else {
provider = ws->cman_gtt;
+ }
} else {
provider = ws->kman;
}
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
index f5b122f17c7..1c00a13c1e0 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_bo.h
@@ -42,6 +42,7 @@ struct radeon_bo_desc {
struct pb_desc base;
unsigned initial_domains;
+ unsigned flags;
};
struct radeon_bo {
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
index 67375dccc1d..3596f8d1cd0 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_cs.c
@@ -606,7 +606,7 @@ radeon_cs_create_fence(struct radeon_winsys_cs *rcs)
/* Create a fence, which is a dummy BO. */
fence = cs->ws->base.buffer_create(&cs->ws->base, 1, 1, TRUE,
- RADEON_DOMAIN_GTT);
+ RADEON_DOMAIN_GTT, 0);
/* Add the fence as a dummy relocation. */
cs->ws->base.cs_add_reloc(rcs, cs->ws->base.buffer_get_cs_handle(fence),
RADEON_USAGE_READWRITE, RADEON_DOMAIN_GTT,
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
index 9e60de3ab77..910d06b5dba 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
@@ -424,7 +424,9 @@ static void radeon_winsys_destroy(struct radeon_winsys *rws)
pipe_mutex_destroy(ws->cs_stack_lock);
ws->cman_vram->destroy(ws->cman_vram);
+ ws->cman_vram_gtt_wc->destroy(ws->cman_vram_gtt_wc);
ws->cman_gtt->destroy(ws->cman_gtt);
+ ws->cman_gtt_wc->destroy(ws->cman_gtt_wc);
ws->kman->destroy(ws->kman);
if (ws->gen >= DRV_R600) {
radeon_surface_manager_free(ws->surf_man);
@@ -642,9 +644,15 @@ radeon_drm_winsys_create(int fd, radeon_screen_create_t screen_create)
ws->cman_vram = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
if (!ws->cman_vram)
goto fail;
+ ws->cman_vram_gtt_wc = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
+ if (!ws->cman_vram_gtt_wc)
+ goto fail;
ws->cman_gtt = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
if (!ws->cman_gtt)
goto fail;
+ ws->cman_gtt_wc = pb_cache_manager_create(ws->kman, 1000000, 2.0f, 0);
+ if (!ws->cman_gtt_wc)
+ goto fail;
if (ws->gen >= DRV_R600) {
ws->surf_man = radeon_surface_manager_new(fd);
@@ -701,8 +709,12 @@ fail:
pipe_mutex_unlock(fd_tab_mutex);
if (ws->cman_gtt)
ws->cman_gtt->destroy(ws->cman_gtt);
+ if (ws->cman_gtt_wc)
+ ws->cman_gtt_wc->destroy(ws->cman_gtt_wc);
if (ws->cman_vram)
ws->cman_vram->destroy(ws->cman_vram);
+ if (ws->cman_vram_gtt_wc)
+ ws->cman_vram_gtt_wc->destroy(ws->cman_vram_gtt_wc);
if (ws->kman)
ws->kman->destroy(ws->kman);
if (ws->surf_man)
diff --git a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
index fc6f53b7231..ea6f7f01f14 100644
--- a/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_drm_winsys.h
@@ -58,7 +58,9 @@ struct radeon_drm_winsys {
struct pb_manager *kman;
struct pb_manager *cman_vram;
+ struct pb_manager *cman_vram_gtt_wc;
struct pb_manager *cman_gtt;
+ struct pb_manager *cman_gtt_wc;
struct radeon_surface_manager *surf_man;
uint32_t num_cpus; /* Number of CPUs. */
diff --git a/src/gallium/winsys/radeon/drm/radeon_winsys.h b/src/gallium/winsys/radeon/drm/radeon_winsys.h
index a63a50b01e8..9aea1e89f06 100644
--- a/src/gallium/winsys/radeon/drm/radeon_winsys.h
+++ b/src/gallium/winsys/radeon/drm/radeon_winsys.h
@@ -65,6 +65,10 @@ enum radeon_bo_domain { /* bitfield */
RADEON_DOMAIN_VRAM_GTT = RADEON_DOMAIN_VRAM | RADEON_DOMAIN_GTT
};
+enum radeon_bo_flag { /* bitfield */
+ RADEON_FLAG_GTT_WC = (1 << 0)
+};
+
enum radeon_bo_usage { /* bitfield */
RADEON_USAGE_READ = 2,
RADEON_USAGE_WRITE = 4,
@@ -287,7 +291,8 @@ struct radeon_winsys {
unsigned size,
unsigned alignment,
boolean use_reusable_pool,
- enum radeon_bo_domain domain);
+ enum radeon_bo_domain domain,
+ enum radeon_bo_flag flags);
struct radeon_winsys_cs_handle *(*buffer_get_cs_handle)(
struct pb_buffer *buf);
generated by cgit v1.2.3 (git 2.39.1) at 2024-12-17 14:54:03 +0000