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-rw-r--r--src/gallium/winsys/intel/drm/intel_drm_winsys.c12
-rw-r--r--src/gallium/winsys/intel/intel_winsys.h22
2 files changed, 19 insertions, 15 deletions
diff --git a/src/gallium/winsys/intel/drm/intel_drm_winsys.c b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
index 5cdf39fe32e..1dc9b1cfefc 100644
--- a/src/gallium/winsys/intel/drm/intel_drm_winsys.c
+++ b/src/gallium/winsys/intel/drm/intel_drm_winsys.c
@@ -139,6 +139,7 @@ init_info(struct intel_winsys *winsys)
get_param(winsys, I915_PARAM_HAS_LLC, &val);
info->has_llc = val;
+ info->has_address_swizzling = test_address_swizzling(winsys);
/* test TIMESTAMP read */
info->has_timestamp = test_reg_read(winsys, 0x2358);
@@ -146,8 +147,6 @@ init_info(struct intel_winsys *winsys)
get_param(winsys, I915_PARAM_HAS_GEN7_SOL_RESET, &val);
info->has_gen7_sol_reset = val;
- info->has_address_swizzling = test_address_swizzling(winsys);
-
return true;
}
@@ -380,21 +379,24 @@ intel_winsys_can_submit_bo(struct intel_winsys *winsys,
int
intel_winsys_submit_bo(struct intel_winsys *winsys,
+ enum intel_ring_type ring,
struct intel_bo *bo, int used,
struct intel_context *ctx,
unsigned long flags)
{
+ const unsigned long exec_flags = (unsigned long) ring | flags;
+
/* logical contexts are only available for the render ring */
- if ((flags & 0x7) > INTEL_EXEC_RENDER)
+ if (ring != INTEL_RING_RENDER)
ctx = NULL;
if (ctx) {
return drm_intel_gem_bo_context_exec(gem_bo(bo),
- (drm_intel_context *) ctx, used, flags);
+ (drm_intel_context *) ctx, used, exec_flags);
}
else {
return drm_intel_bo_mrb_exec(gem_bo(bo),
- used, NULL, 0, 0, flags);
+ used, NULL, 0, 0, exec_flags);
}
}
diff --git a/src/gallium/winsys/intel/intel_winsys.h b/src/gallium/winsys/intel/intel_winsys.h
index b5995fbb40f..c37fa1129e2 100644
--- a/src/gallium/winsys/intel/intel_winsys.h
+++ b/src/gallium/winsys/intel/intel_winsys.h
@@ -31,16 +31,15 @@
#include "pipe/p_compiler.h"
/* this is compatible with i915_drm.h's definitions */
-enum intel_exec_flag {
- /* bits[2:0]: ring type */
- INTEL_EXEC_DEFAULT = 0 << 0,
- INTEL_EXEC_RENDER = 1 << 0,
- INTEL_EXEC_BSD = 2 << 0,
- INTEL_EXEC_BLT = 3 << 0,
-
- /* bits[7:6]: constant buffer addressing mode */
+enum intel_ring_type {
+ INTEL_RING_RENDER = 1,
+ INTEL_RING_BSD = 2,
+ INTEL_RING_BLT = 3,
+ INTEL_RING_VEBOX = 4,
+};
- /* bits[8]: reset SO write offset register on GEN7+ */
+/* this is compatible with i915_drm.h's definitions */
+enum intel_exec_flag {
INTEL_EXEC_GEN7_SOL_RESET = 1 << 8,
};
@@ -72,11 +71,13 @@ struct intel_winsys_info {
int max_batch_size;
bool has_llc;
- bool has_gen7_sol_reset;
bool has_address_swizzling;
/* valid registers for intel_winsys_read_reg() */
bool has_timestamp;
+
+ /* valid flags for intel_winsys_submit_bo() */
+ bool has_gen7_sol_reset;
};
struct intel_winsys *
@@ -183,6 +184,7 @@ intel_winsys_can_submit_bo(struct intel_winsys *winsys,
*/
int
intel_winsys_submit_bo(struct intel_winsys *winsys,
+ enum intel_ring_type ring,
struct intel_bo *bo, int used,
struct intel_context *ctx,
unsigned long flags);