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-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_emit.c4
-rw-r--r--src/gallium/drivers/freedreno/a6xx/fd6_program.c10
2 files changed, 7 insertions, 7 deletions
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
index 75c8c91d897..c9cf26721b4 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_emit.c
@@ -1124,13 +1124,13 @@ t7 opcode: CP_WAIT_FOR_IDLE (26) (1 dwords)
OUT_RING(ring, 0);
WRITE(REG_A6XX_GRAS_UNKNOWN_8101, 0);
- WRITE(REG_A6XX_GRAS_UNKNOWN_8109, 0);
+ WRITE(REG_A6XX_GRAS_SAMPLE_CNTL, 0);
WRITE(REG_A6XX_GRAS_UNKNOWN_8110, 0);
WRITE(REG_A6XX_RB_RENDER_CONTROL0, 0x401);
WRITE(REG_A6XX_RB_RENDER_CONTROL1, 0);
WRITE(REG_A6XX_RB_FS_OUTPUT_CNTL0, 0);
- WRITE(REG_A6XX_RB_UNKNOWN_8810, 0);
+ WRITE(REG_A6XX_RB_SAMPLE_CNTL, 0);
WRITE(REG_A6XX_RB_UNKNOWN_8818, 0);
WRITE(REG_A6XX_RB_UNKNOWN_8819, 0);
WRITE(REG_A6XX_RB_UNKNOWN_881A, 0);
diff --git a/src/gallium/drivers/freedreno/a6xx/fd6_program.c b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
index 3c4192ba19a..d6780937030 100644
--- a/src/gallium/drivers/freedreno/a6xx/fd6_program.c
+++ b/src/gallium/drivers/freedreno/a6xx/fd6_program.c
@@ -509,7 +509,7 @@ setup_stateobj(struct fd_ringbuffer *ring,
A6XX_HLSQ_CONTROL_2_REG_SAMPLEID(samp_id_regid) |
A6XX_HLSQ_CONTROL_2_REG_SAMPLEMASK(samp_mask_regid) |
0xfc000000); /* XXX */
- OUT_RING(ring, A6XX_HLSQ_CONTROL_3_REG_FRAGCOORDXYREGID(vcoord_regid) |
+ OUT_RING(ring, A6XX_HLSQ_CONTROL_3_REG_BARY_IJ_PIXEL(vcoord_regid) |
0xfcfcfc00); /* XXX */
OUT_RING(ring, A6XX_HLSQ_CONTROL_4_REG_XYCOORDREGID(coord_regid) |
A6XX_HLSQ_CONTROL_4_REG_ZWCOORDREGID(zwcoord_regid) |
@@ -546,23 +546,23 @@ setup_stateobj(struct fd_ringbuffer *ring,
OUT_PKT4(ring, REG_A6XX_GRAS_CNTL, 1);
OUT_RING(ring, COND(enable_varyings, A6XX_GRAS_CNTL_VARYING) |
COND(s[FS].v->frag_coord,
- A6XX_GRAS_CNTL_UNK3 |
+ A6XX_GRAS_CNTL_SIZE |
A6XX_GRAS_CNTL_XCOORD |
A6XX_GRAS_CNTL_YCOORD |
A6XX_GRAS_CNTL_ZCOORD |
A6XX_GRAS_CNTL_WCOORD) |
- COND(s[FS].v->frag_face, A6XX_GRAS_CNTL_UNK3));
+ COND(s[FS].v->frag_face, A6XX_GRAS_CNTL_SIZE));
OUT_PKT4(ring, REG_A6XX_RB_RENDER_CONTROL0, 2);
OUT_RING(ring, COND(enable_varyings, A6XX_RB_RENDER_CONTROL0_VARYING |
A6XX_RB_RENDER_CONTROL0_UNK10) |
COND(s[FS].v->frag_coord,
- A6XX_RB_RENDER_CONTROL0_UNK3 |
+ A6XX_RB_RENDER_CONTROL0_SIZE |
A6XX_RB_RENDER_CONTROL0_XCOORD |
A6XX_RB_RENDER_CONTROL0_YCOORD |
A6XX_RB_RENDER_CONTROL0_ZCOORD |
A6XX_RB_RENDER_CONTROL0_WCOORD) |
- COND(s[FS].v->frag_face, A6XX_RB_RENDER_CONTROL0_UNK3));
+ COND(s[FS].v->frag_face, A6XX_RB_RENDER_CONTROL0_SIZE));
OUT_RING(ring,
COND(samp_mask_regid != regid(63, 0),