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-rw-r--r--src/gallium/drivers/r300/Makefile.am1
-rw-r--r--src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c8
-rw-r--r--src/gallium/drivers/r300/compiler/tests/r300_compiler_tests.c1
-rw-r--r--src/gallium/drivers/r300/compiler/tests/radeon_compiler_regalloc_tests.c99
-rw-r--r--src/gallium/drivers/r300/compiler/tests/regalloc_tex_1d_swizzle.test15
5 files changed, 124 insertions, 0 deletions
diff --git a/src/gallium/drivers/r300/Makefile.am b/src/gallium/drivers/r300/Makefile.am
index f82b8e9f964..ab8b4e8297d 100644
--- a/src/gallium/drivers/r300/Makefile.am
+++ b/src/gallium/drivers/r300/Makefile.am
@@ -24,6 +24,7 @@ r300_compiler_tests_CPPFLAGS = \
r300_compiler_tests_SOURCES = \
$(testdir)/r300_compiler_tests.c \
$(testdir)/radeon_compiler_optimize_tests.c \
+ $(testdir)/radeon_compiler_regalloc_tests.c \
$(testdir)/radeon_compiler_util_tests.c \
$(testdir)/rc_test_helpers.c \
$(testdir)/unit_test.c
diff --git a/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c b/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c
index 6442e0dca80..1970a346d1d 100644
--- a/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c
+++ b/src/gallium/drivers/r300/compiler/radeon_pair_regalloc.c
@@ -383,6 +383,14 @@ static enum rc_reg_class variable_get_class(
RC_INSTRUCTION_PAIR ) {
old_swizzle = r.U.P.Arg->Swizzle;
} else {
+ /* Source operands of TEX
+ * instructions can't be
+ * swizzle on r300/r400 GPUs.
+ */
+ if (!variable->C->is_r500) {
+ can_change_writemask = 0;
+ break;
+ }
old_swizzle = r.U.I.Src->Swizzle;
}
new_swizzle = rc_adjust_channels(
diff --git a/src/gallium/drivers/r300/compiler/tests/r300_compiler_tests.c b/src/gallium/drivers/r300/compiler/tests/r300_compiler_tests.c
index cc4725ab06d..0406ae61964 100644
--- a/src/gallium/drivers/r300/compiler/tests/r300_compiler_tests.c
+++ b/src/gallium/drivers/r300/compiler/tests/r300_compiler_tests.c
@@ -33,6 +33,7 @@ int main(int argc, char ** argv)
{
unsigned pass = 1;
pass &= radeon_compiler_optimize_run_tests();
+ pass &= radeon_compiler_regalloc_run_tests();
pass &= radeon_compiler_util_run_tests();
if (pass) {
diff --git a/src/gallium/drivers/r300/compiler/tests/radeon_compiler_regalloc_tests.c b/src/gallium/drivers/r300/compiler/tests/radeon_compiler_regalloc_tests.c
new file mode 100644
index 00000000000..eeb6b072d20
--- /dev/null
+++ b/src/gallium/drivers/r300/compiler/tests/radeon_compiler_regalloc_tests.c
@@ -0,0 +1,99 @@
+/*
+ * Copyright 2013 Advanced Micro Devices, Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * on the rights to use, copy, modify, merge, publish, distribute, sub
+ * license, and/or sell copies of the Software, and to permit persons to whom
+ * the Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
+ * USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Author: Tom Stellard <[email protected]>
+ */
+
+#include "radeon_program_pair.h"
+
+#include "r300_compiler_tests.h"
+#include "rc_test_helpers.h"
+#include "unit_test.h"
+
+static void dummy_allocate_hw_inputs(
+ struct r300_fragment_program_compiler * c,
+ void (*allocate)(void * data, unsigned input, unsigned hwreg),
+ void * mydata)
+{
+ unsigned i;
+ for (i = 0; i < 10; i++) {
+ allocate(mydata, i, i);
+ }
+}
+
+static void test_runner_rc_regalloc(
+ struct test_result *result,
+ struct radeon_compiler *c,
+ const char *filename)
+{
+ struct rc_test_file test_file;
+ unsigned optimizations = 1;
+ unsigned do_full_regalloc = 1;
+ struct rc_instruction *inst;
+ unsigned pass = 1;
+
+ test_begin(result);
+
+ if (!load_program(c, &test_file, filename)) {
+ fprintf(stderr, "Failed to load program\n");
+ }
+
+ rc_pair_translate(c, NULL);
+ rc_pair_schedule(c, &optimizations);
+ rc_pair_remove_dead_sources(c, NULL);
+ rc_pair_regalloc(c, &do_full_regalloc);
+
+ for(inst = c->Program.Instructions.Next;
+ inst != &c->Program.Instructions;
+ inst = inst->Next) {
+ if (inst->Type == RC_INSTRUCTION_NORMAL &&
+ inst->U.I.Opcode != RC_OPCODE_BEGIN_TEX) {
+ if (GET_SWZ(inst->U.I.SrcReg[0].Swizzle, 0)
+ != RC_SWIZZLE_X) {
+ pass = 0;
+ }
+ }
+ }
+
+ test_check(result, pass);
+}
+
+static void tex_1d_swizzle(struct test_result *result)
+{
+ struct radeon_compiler c;
+
+ init_compiler(&c, RC_FRAGMENT_PROGRAM, 0, 0);
+ struct r300_fragment_program_compiler *cc =
+ (struct r300_fragment_program_compiler*)&c;
+ cc->AllocateHwInputs = dummy_allocate_hw_inputs;
+
+ test_runner_rc_regalloc(result, &c, "regalloc_tex_1d_swizzle.test");
+}
+
+unsigned radeon_compiler_regalloc_run_tests()
+{
+ struct test tests[] = {
+ {"rc_pair_regalloc() => TEX 1D Swizzle - r300", tex_1d_swizzle},
+ {NULL, NULL}
+ };
+ return run_tests(tests);
+}
diff --git a/src/gallium/drivers/r300/compiler/tests/regalloc_tex_1d_swizzle.test b/src/gallium/drivers/r300/compiler/tests/regalloc_tex_1d_swizzle.test
new file mode 100644
index 00000000000..8ecfcc1fc5b
--- /dev/null
+++ b/src/gallium/drivers/r300/compiler/tests/regalloc_tex_1d_swizzle.test
@@ -0,0 +1,15 @@
+const[0] = { 0.0000 2.0000 1.0000 0.0000 }
+ 0: TEX temp[8].xyz, input[1].xy__, 2D[0];
+ 1: TEX temp[10].xyz, input[2].xyz_, CUBE[2];
+ 2: TEX temp[12].xyz, input[1].xy__, 2D[1];
+ 3: DP3 temp[14].w, input[2].xyz_, input[2].xyz_;
+ 4: MAD temp[15].xyz, temp[12].xyz_, const[0].yyy_, -none.111_;
+ 5: MAD temp[16].xyz, temp[10].xyz_, const[0].yyy_, -none.111_;
+ 6: MUL temp[17].xyz, temp[8].xyz_, input[0].xyz_;
+ 7: MOV output[0].w, none.___0;
+ 8: MOV temp[0].x, temp[14].w___;
+ 9: TEX temp[18].x, temp[0].x___, 1D[3];
+ 10: DP3 temp[20].w, temp[16].xyz_, temp[15].xyz_;
+ 11: MUL temp[21].xyz, temp[17].xyz_, temp[18].xxx_;
+ 12: MUL output[0].xyz, temp[21].xyz_, temp[20].www_;
+=