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-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_internal.h2
-rw-r--r--src/gallium/drivers/etnaviv/etnaviv_screen.c21
2 files changed, 23 insertions, 0 deletions
diff --git a/src/gallium/drivers/etnaviv/etnaviv_internal.h b/src/gallium/drivers/etnaviv/etnaviv_internal.h
index 707a1e0773c..48dd5bf324a 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_internal.h
+++ b/src/gallium/drivers/etnaviv/etnaviv_internal.h
@@ -60,6 +60,8 @@
/* GPU chip 3D specs */
struct etna_specs {
+ /* HALTI (gross architecture) level. -1 for pre-HALTI. */
+ int halti : 8;
/* supports SUPERTILE (64x64) tiling? */
unsigned can_supertile : 1;
/* needs z=(z+w)/2, for older GCxxx */
diff --git a/src/gallium/drivers/etnaviv/etnaviv_screen.c b/src/gallium/drivers/etnaviv/etnaviv_screen.c
index cea59ea4f82..51cb513c1a7 100644
--- a/src/gallium/drivers/etnaviv/etnaviv_screen.c
+++ b/src/gallium/drivers/etnaviv/etnaviv_screen.c
@@ -690,6 +690,27 @@ etna_get_specs(struct etna_screen *screen)
}
screen->specs.num_constants = val;
+ /* Figure out gross GPU architecture. See rnndb/common.xml for a specific
+ * description of the differences. */
+ if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI5))
+ screen->specs.halti = 5; /* New GC7000/GC8x00 */
+ else if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI4))
+ screen->specs.halti = 4; /* Old GC7000/GC7400 */
+ else if (VIV_FEATURE(screen, chipMinorFeatures5, HALTI3))
+ screen->specs.halti = 3; /* None? */
+ else if (VIV_FEATURE(screen, chipMinorFeatures4, HALTI2))
+ screen->specs.halti = 2; /* GC2500/GC3000/GC5000/GC6400 */
+ else if (VIV_FEATURE(screen, chipMinorFeatures2, HALTI1))
+ screen->specs.halti = 1; /* GC900/GC4000/GC7000UL */
+ else if (VIV_FEATURE(screen, chipMinorFeatures1, HALTI0))
+ screen->specs.halti = 0; /* GC880/GC2000/GC7000TM */
+ else
+ screen->specs.halti = -1; /* GC7000nanolite / pre-GC2000 except GC880 */
+ if (screen->specs.halti >= 0)
+ DBG("etnaviv: GPU arch: HALTI%d\n", screen->specs.halti);
+ else
+ DBG("etnaviv: GPU arch: pre-HALTI\n");
+
screen->specs.can_supertile =
VIV_FEATURE(screen, chipMinorFeatures0, SUPER_TILED);
screen->specs.bits_per_tile =