diff options
Diffstat (limited to 'src/gallium/drivers')
| -rw-r--r-- | src/gallium/drivers/r600/evergreen_state.c | 39 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_blit.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_hw_context.c | 1 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_pipe.h | 7 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_state.c | 19 | ||||
| -rw-r--r-- | src/gallium/drivers/r600/r600_state_common.c | 11 |
6 files changed, 61 insertions, 17 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c index c16dcd45f28..d89d2cea284 100644 --- a/src/gallium/drivers/r600/evergreen_state.c +++ b/src/gallium/drivers/r600/evergreen_state.c @@ -1142,10 +1142,6 @@ static void evergreen_set_polygon_stipple(struct pipe_context *ctx, { } -static void evergreen_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask) -{ -} - static void evergreen_get_scissor_rect(struct r600_context *rctx, unsigned tl_x, unsigned tl_y, unsigned br_x, unsigned br_y, uint32_t *tl, uint32_t *br) @@ -1834,6 +1830,26 @@ static void evergreen_emit_ps_sampler(struct r600_context *rctx, struct r600_ato evergreen_emit_sampler(rctx, &rctx->ps_samplers, 0, R_00A400_TD_PS_SAMPLER0_BORDER_INDEX); } +static void evergreen_emit_sample_mask(struct r600_context *rctx, struct r600_atom *a) +{ + struct r600_sample_mask *s = (struct r600_sample_mask*)a; + uint8_t mask = s->sample_mask; + + r600_write_context_reg(rctx->cs, R_028C3C_PA_SC_AA_MASK, + mask | (mask << 8) | (mask << 16) | (mask << 24)); +} + +static void cayman_emit_sample_mask(struct r600_context *rctx, struct r600_atom *a) +{ + struct r600_sample_mask *s = (struct r600_sample_mask*)a; + struct radeon_winsys_cs *cs = rctx->cs; + uint16_t mask = s->sample_mask; + + r600_write_context_reg_seq(cs, CM_R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, 2); + r600_write_value(cs, mask | (mask << 16)); /* X0Y0_X1Y0 */ + r600_write_value(cs, mask | (mask << 16)); /* X0Y1_X1Y1 */ +} + void evergreen_init_state_functions(struct r600_context *rctx) { r600_init_atom(&rctx->cb_misc_state.atom, evergreen_emit_cb_misc_state, 0, 0); @@ -1850,6 +1866,13 @@ void evergreen_init_state_functions(struct r600_context *rctx) r600_init_atom(&rctx->vs_samplers.atom_sampler, evergreen_emit_vs_sampler, 0, 0); r600_init_atom(&rctx->ps_samplers.atom_sampler, evergreen_emit_ps_sampler, 0, 0); + if (rctx->chip_class == EVERGREEN) + r600_init_atom(&rctx->sample_mask.atom, evergreen_emit_sample_mask, 3, 0); + else + r600_init_atom(&rctx->sample_mask.atom, cayman_emit_sample_mask, 4, 0); + rctx->sample_mask.sample_mask = ~0; + r600_atom_dirty(rctx, &rctx->sample_mask.atom); + rctx->context.create_blend_state = evergreen_create_blend_state; rctx->context.create_depth_stencil_alpha_state = evergreen_create_dsa_state; rctx->context.create_fs_state = r600_create_shader_state_ps; @@ -1879,7 +1902,7 @@ void evergreen_init_state_functions(struct r600_context *rctx) rctx->context.set_fragment_sampler_views = evergreen_set_ps_sampler_views; rctx->context.set_framebuffer_state = evergreen_set_framebuffer_state; rctx->context.set_polygon_stipple = evergreen_set_polygon_stipple; - rctx->context.set_sample_mask = evergreen_set_sample_mask; + rctx->context.set_sample_mask = r600_set_sample_mask; rctx->context.set_scissor_state = evergreen_set_scissor_state; rctx->context.set_stencil_ref = r600_set_pipe_stencil_ref; rctx->context.set_vertex_buffers = r600_set_vertex_buffers; @@ -1993,10 +2016,6 @@ static void cayman_init_atom_start_cs(struct r600_context *rctx) r600_store_ctl_const(cb, R_03CFF0_SQ_VTX_BASE_VTX_LOC, 0); - r600_store_context_reg_seq(cb, CM_R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0, 2); - r600_store_value(cb, ~0); /* CM_R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0 */ - r600_store_value(cb, ~0); /* CM_R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1 */ - r600_store_context_reg_seq(cb, R_028028_DB_STENCIL_CLEAR, 2); r600_store_value(cb, 0); /* R_028028_DB_STENCIL_CLEAR */ r600_store_value(cb, 0x3F800000); /* R_02802C_DB_DEPTH_CLEAR */ @@ -2513,8 +2532,6 @@ void evergreen_init_atom_start_cs(struct r600_context *rctx) r600_store_value(cb, 0x3F800000); /* R_028C18_PA_CL_GB_HORZ_DISC_ADJ */ r600_store_value(cb, 0); /* R_028C1C_PA_SC_AA_SAMPLE_LOCS_0 */ - r600_store_context_reg(cb, R_028C3C_PA_SC_AA_MASK, ~0); - r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2); r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */ r600_store_value(cb, S_028244_BR_X(16384) | S_028244_BR_Y(16384)); /* R_028244_PA_SC_GENERIC_SCISSOR_BR */ diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c index 42fec3f3f0d..86af8840645 100644 --- a/src/gallium/drivers/r600/r600_blit.c +++ b/src/gallium/drivers/r600/r600_blit.c @@ -69,6 +69,7 @@ static void r600_blitter_begin(struct pipe_context *ctx, enum r600_blitter_op op if (rctx->states[R600_PIPE_STATE_STENCIL_REF]) { util_blitter_save_stencil_ref(rctx->blitter, &rctx->stencil_ref); } + util_blitter_save_sample_mask(rctx->blitter, rctx->sample_mask.sample_mask); } if (op & R600_SAVE_FRAMEBUFFER) diff --git a/src/gallium/drivers/r600/r600_hw_context.c b/src/gallium/drivers/r600/r600_hw_context.c index 09d8e174b3d..d0b453ac7c0 100644 --- a/src/gallium/drivers/r600/r600_hw_context.c +++ b/src/gallium/drivers/r600/r600_hw_context.c @@ -955,6 +955,7 @@ void r600_context_flush(struct r600_context *ctx, unsigned flags) if (ctx->chip_class <= R700) { r600_atom_dirty(ctx, &ctx->seamless_cube_map.atom); } + r600_atom_dirty(ctx, &ctx->sample_mask.atom); ctx->vertex_buffer_state.dirty_mask = ctx->vertex_buffer_state.enabled_mask; r600_vertex_buffers_dirty(ctx); diff --git a/src/gallium/drivers/r600/r600_pipe.h b/src/gallium/drivers/r600/r600_pipe.h index 926f6eb05dc..8887a982cfd 100644 --- a/src/gallium/drivers/r600/r600_pipe.h +++ b/src/gallium/drivers/r600/r600_pipe.h @@ -106,6 +106,11 @@ struct r600_cs_shader_state { struct r600_pipe_compute *shader; }; +struct r600_sample_mask { + struct r600_atom atom; + uint16_t sample_mask; /* there are only 8 bits on EG, 16 bits on Cayman */ +}; + enum r600_pipe_state_id { R600_PIPE_STATE_BLEND = 0, R600_PIPE_STATE_BLEND_COLOR, @@ -379,6 +384,7 @@ struct r600_context { struct r600_textures_info ps_samplers; struct r600_seamless_cube_map seamless_cube_map; struct r600_cs_shader_state cs_shader_state; + struct r600_sample_mask sample_mask; struct radeon_winsys_cs *cs; @@ -600,6 +606,7 @@ void r600_set_so_targets(struct pipe_context *ctx, unsigned num_targets, struct pipe_stream_output_target **targets, unsigned append_bitmask); +void r600_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask); void r600_set_pipe_stencil_ref(struct pipe_context *ctx, const struct pipe_stencil_ref *state); void r600_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *info); diff --git a/src/gallium/drivers/r600/r600_state.c b/src/gallium/drivers/r600/r600_state.c index ce6b12f4383..b4f61a48a46 100644 --- a/src/gallium/drivers/r600/r600_state.c +++ b/src/gallium/drivers/r600/r600_state.c @@ -1136,10 +1136,6 @@ static void r600_set_polygon_stipple(struct pipe_context *ctx, { } -static void r600_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask) -{ -} - void r600_set_scissor_state(struct r600_context *rctx, const struct pipe_scissor_state *state) { @@ -1754,6 +1750,15 @@ static void r600_emit_seamless_cube_map(struct r600_context *rctx, struct r600_a r600_write_config_reg(cs, R_009508_TA_CNTL_AUX, tmp); } +static void r600_emit_sample_mask(struct r600_context *rctx, struct r600_atom *a) +{ + struct r600_sample_mask *s = (struct r600_sample_mask*)a; + uint8_t mask = s->sample_mask; + + r600_write_context_reg(rctx->cs, R_028C48_PA_SC_AA_MASK, + mask | (mask << 8) | (mask << 16) | (mask << 24)); +} + void r600_init_state_functions(struct r600_context *rctx) { r600_init_atom(&rctx->seamless_cube_map.atom, r600_emit_seamless_cube_map, 3, 0); @@ -1773,6 +1778,10 @@ void r600_init_state_functions(struct r600_context *rctx) r600_init_atom(&rctx->vs_samplers.atom_sampler, r600_emit_vs_sampler, 0, EMIT_EARLY); r600_init_atom(&rctx->ps_samplers.atom_sampler, r600_emit_ps_sampler, 0, EMIT_EARLY); + r600_init_atom(&rctx->sample_mask.atom, r600_emit_sample_mask, 3, 0); + rctx->sample_mask.sample_mask = ~0; + r600_atom_dirty(rctx, &rctx->sample_mask.atom); + rctx->context.create_blend_state = r600_create_blend_state; rctx->context.create_depth_stencil_alpha_state = r600_create_dsa_state; rctx->context.create_fs_state = r600_create_shader_state_ps; @@ -2166,8 +2175,6 @@ void r600_init_atom_start_cs(struct r600_context *rctx) r600_store_value(cb, 0xFF); /* R_028C38_CB_CLRCMP_DST */ r600_store_value(cb, 0xFFFFFFFF); /* R_028C3C_CB_CLRCMP_MSK */ - r600_store_context_reg(cb, R_028C48_PA_SC_AA_MASK, 0xFFFFFFFF); - r600_store_context_reg_seq(cb, R_028030_PA_SC_SCREEN_SCISSOR_TL, 2); r600_store_value(cb, 0); /* R_028030_PA_SC_SCREEN_SCISSOR_TL */ r600_store_value(cb, S_028034_BR_X(8192) | S_028034_BR_Y(8192)); /* R_028034_PA_SC_SCREEN_SCISSOR_BR */ diff --git a/src/gallium/drivers/r600/r600_state_common.c b/src/gallium/drivers/r600/r600_state_common.c index 97a7c7ea2c7..393d81b7f3d 100644 --- a/src/gallium/drivers/r600/r600_state_common.c +++ b/src/gallium/drivers/r600/r600_state_common.c @@ -976,6 +976,17 @@ void r600_set_so_targets(struct pipe_context *ctx, rctx->streamout_append_bitmask = append_bitmask; } +void r600_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask) +{ + struct r600_context *rctx = (struct r600_context*)pipe; + + if (rctx->sample_mask.sample_mask == (uint16_t)sample_mask) + return; + + rctx->sample_mask.sample_mask = sample_mask; + r600_atom_dirty(rctx, &rctx->sample_mask.atom); +} + static void r600_update_derived_state(struct r600_context *rctx) { struct pipe_context * ctx = (struct pipe_context*)rctx; |