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-rw-r--r--src/gallium/drivers/r600/evergreen_state.c7
-rw-r--r--src/gallium/drivers/r600/r600_blit.c72
-rw-r--r--src/gallium/drivers/r600/r600_resource.h2
3 files changed, 79 insertions, 2 deletions
diff --git a/src/gallium/drivers/r600/evergreen_state.c b/src/gallium/drivers/r600/evergreen_state.c
index 72a2fe2b6b1..48de6c5249d 100644
--- a/src/gallium/drivers/r600/evergreen_state.c
+++ b/src/gallium/drivers/r600/evergreen_state.c
@@ -1853,7 +1853,7 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
}
/* Colorbuffers. */
- rctx->framebuffer.atom.num_dw += state->nr_cbufs * 21;
+ rctx->framebuffer.atom.num_dw += state->nr_cbufs * 23;
if (rctx->keep_tiling_flags)
rctx->framebuffer.atom.num_dw += state->nr_cbufs * 2;
rctx->framebuffer.atom.num_dw += (12 - state->nr_cbufs) * 3;
@@ -2173,12 +2173,13 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
/* Colorbuffers. */
for (i = 0; i < nr_cbufs; i++) {
struct r600_surface *cb = (struct r600_surface*)state->cbufs[i];
+ struct r600_texture *tex = (struct r600_texture *)cb->base.texture;
unsigned reloc = r600_context_bo_reloc(rctx,
&rctx->rings.gfx,
(struct r600_resource*)cb->base.texture,
RADEON_USAGE_READWRITE);
- r600_write_context_reg_seq(cs, R_028C60_CB_COLOR0_BASE + i * 0x3C, 11);
+ r600_write_context_reg_seq(cs, R_028C60_CB_COLOR0_BASE + i * 0x3C, 13);
r600_write_value(cs, cb->cb_color_base); /* R_028C60_CB_COLOR0_BASE */
r600_write_value(cs, cb->cb_color_pitch); /* R_028C64_CB_COLOR0_PITCH */
r600_write_value(cs, cb->cb_color_slice); /* R_028C68_CB_COLOR0_SLICE */
@@ -2190,6 +2191,8 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
r600_write_value(cs, cb->cb_color_cmask_slice); /* R_028C80_CB_COLOR0_CMASK_SLICE */
r600_write_value(cs, cb->cb_color_fmask); /* R_028C84_CB_COLOR0_FMASK */
r600_write_value(cs, cb->cb_color_fmask_slice); /* R_028C88_CB_COLOR0_FMASK_SLICE */
+ r600_write_value(cs, tex->color_clear_value[0]); /* R_028C8C_CB_COLOR0_CLEAR_WORD0 */
+ r600_write_value(cs, tex->color_clear_value[1]); /* R_028C90_CB_COLOR0_CLEAR_WORD1 */
r600_write_value(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C60_CB_COLOR0_BASE */
r600_write_value(cs, reloc);
diff --git a/src/gallium/drivers/r600/r600_blit.c b/src/gallium/drivers/r600/r600_blit.c
index dcc397851fc..1cdd1c81109 100644
--- a/src/gallium/drivers/r600/r600_blit.c
+++ b/src/gallium/drivers/r600/r600_blit.c
@@ -413,6 +413,58 @@ static boolean is_simple_msaa_resolve(const struct pipe_blit_info *info)
dst_tile_mode >= RADEON_SURF_MODE_1D;
}
+static void r600_clear_buffer(struct pipe_context *ctx, struct pipe_resource *dst,
+ unsigned offset, unsigned size, unsigned char value);
+
+static void evergreen_set_clear_color(struct pipe_context *ctx,
+ struct pipe_surface *cbuf,
+ const union pipe_color_union *color)
+{
+ struct r600_context *rctx = (struct r600_context *)ctx;
+ struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
+ unsigned *clear_value = ((struct r600_texture *)cbuf->texture)->color_clear_value;
+ union util_color uc;
+
+ memset(&uc, 0, sizeof(uc));
+ util_pack_color(color->f, fb->cbufs[0]->format, &uc);
+ memcpy(clear_value, &uc, 2 * sizeof(uint32_t));
+}
+
+static bool can_fast_clear_color(struct pipe_context *ctx)
+{
+ struct r600_context *rctx = (struct r600_context *)ctx;
+ struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
+ int i;
+
+ if (rctx->chip_class < EVERGREEN) {
+ return false;
+ }
+
+ for (i = 0; i < fb->nr_cbufs; i++) {
+ struct r600_texture *tex = (struct r600_texture *)fb->cbufs[i]->texture;
+ int target = fb->cbufs[i]->texture->target;
+
+ if (tex->cmask_size == 0) {
+ return false;
+ }
+
+ /* cannot pack color for pure integer formats */
+ /* 128-bit formats are unuspported */
+ if (util_format_is_pure_integer(fb->cbufs[i]->format) ||
+ util_format_get_blocksizebits(fb->cbufs[i]->format) > 64) {
+ return false;
+ }
+
+ /* textures with multiple images are not supported */
+ if (target != PIPE_TEXTURE_2D && target != PIPE_TEXTURE_RECT &&
+ target != PIPE_TEXTURE_1D) {
+ return false;
+ }
+ }
+
+ return true;
+}
+
static void r600_clear(struct pipe_context *ctx, unsigned buffers,
const union pipe_color_union *color,
double depth, unsigned stencil)
@@ -420,6 +472,26 @@ static void r600_clear(struct pipe_context *ctx, unsigned buffers,
struct r600_context *rctx = (struct r600_context *)ctx;
struct pipe_framebuffer_state *fb = &rctx->framebuffer.state;
+ /* fast color clear on AA framebuffers (EG+) */
+ if ((buffers & PIPE_CLEAR_COLOR) && can_fast_clear_color(ctx)) {
+ int i;
+
+ for (i = 0; i < fb->nr_cbufs; i++) {
+ struct r600_texture *tex = (struct r600_texture *)fb->cbufs[i]->texture;
+
+ evergreen_set_clear_color(ctx, fb->cbufs[i], color);
+ r600_clear_buffer(ctx, fb->cbufs[i]->texture,
+ tex->cmask_offset, tex->cmask_size, 0);
+ tex->dirty_level_mask |= 1 << fb->cbufs[i]->u.tex.level;
+ }
+
+ rctx->framebuffer.atom.dirty = true;
+
+ buffers &= ~PIPE_CLEAR_COLOR;
+ if (!buffers)
+ return;
+ }
+
/* if hyperz enabled just clear hyperz */
if (fb->zsbuf && (buffers & PIPE_CLEAR_DEPTH)) {
struct r600_texture *rtex;
diff --git a/src/gallium/drivers/r600/r600_resource.h b/src/gallium/drivers/r600/r600_resource.h
index d5df63396cc..4c55f66e50c 100644
--- a/src/gallium/drivers/r600/r600_resource.h
+++ b/src/gallium/drivers/r600/r600_resource.h
@@ -91,6 +91,8 @@ struct r600_texture {
struct r600_resource *htile;
/* use htile only for first level */
float depth_clear;
+
+ unsigned color_clear_value[2];
};
#define R600_TEX_IS_TILED(tex, level) ((tex)->array_mode[level] != V_038000_ARRAY_LINEAR_GENERAL && (tex)->array_mode[level] != V_038000_ARRAY_LINEAR_ALIGNED)