diff options
Diffstat (limited to 'src/gallium/drivers')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_blit.c | 2 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_descriptors.c | 12 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 6 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.h | 4 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_shader.c | 34 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.c | 12 | ||||
-rw-r--r-- | src/gallium/drivers/radeonsi/si_state.h | 31 |
7 files changed, 57 insertions, 44 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c index 8c3e1364160..072024aa323 100644 --- a/src/gallium/drivers/radeonsi/si_blit.c +++ b/src/gallium/drivers/radeonsi/si_blit.c @@ -76,7 +76,7 @@ static void si_blitter_begin(struct pipe_context *ctx, enum si_blitter_op op) util_blitter_save_fragment_sampler_views(sctx->blitter, util_last_bit(sctx->samplers[PIPE_SHADER_FRAGMENT].views.desc.enabled_mask & - ((1 << NUM_TEX_UNITS) - 1)), + ((1 << SI_NUM_USER_SAMPLERS) - 1)), sctx->samplers[PIPE_SHADER_FRAGMENT].views.views); } diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c index 38ad0778cf0..6ae9b825c49 100644 --- a/src/gallium/drivers/radeonsi/si_descriptors.c +++ b/src/gallium/drivers/radeonsi/si_descriptors.c @@ -289,7 +289,7 @@ static void si_init_sampler_views(struct si_context *sctx, si_init_descriptors(sctx, &views->desc, si_get_shader_user_data_base(shader) + SI_SGPR_RESOURCE * 4, - 8, NUM_SAMPLER_VIEWS, si_emit_sampler_views); + 8, SI_NUM_SAMPLER_VIEWS, si_emit_sampler_views); } static void si_release_sampler_views(struct si_sampler_views *views) @@ -643,7 +643,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx, /* Set the shader resources.*/ for (i = 0; i < num_targets; i++) { - bufidx = SI_RW_SO + i; + bufidx = SI_SO_BUF_OFFSET + i; if (targets[i]) { struct pipe_resource *buffer = targets[i]->buffer; @@ -677,7 +677,7 @@ static void si_set_streamout_targets(struct pipe_context *ctx, buffers->desc.dirty_mask |= 1 << bufidx; } for (; i < old_num_targets; i++) { - bufidx = SI_RW_SO + i; + bufidx = SI_SO_BUF_OFFSET + i; /* Clear the descriptor and unset the resource. */ memset(buffers->desc_data[bufidx], 0, sizeof(uint32_t) * 4); pipe_resource_reference(&buffers->buffers[bufidx], NULL); @@ -755,7 +755,7 @@ static void si_invalidate_buffer(struct pipe_context *ctx, struct pipe_resource buffers->desc.dirty_mask |= 1 << i; found = true; - if (i >= SI_RW_SO && shader == PIPE_SHADER_VERTEX) { + if (i >= SI_SO_BUF_OFFSET && shader == PIPE_SHADER_VERTEX) { /* Update the streamout state. */ if (sctx->b.streamout.begin_emitted) { r600_emit_streamout_end(&sctx->b); @@ -977,11 +977,11 @@ void si_init_all_descriptors(struct si_context *sctx) for (i = 0; i < SI_NUM_SHADERS; i++) { si_init_buffer_resources(sctx, &sctx->const_buffers[i], - NUM_CONST_BUFFERS, i, SI_SGPR_CONST, + SI_NUM_CONST_BUFFERS, i, SI_SGPR_CONST, RADEON_USAGE_READ, RADEON_PRIO_SHADER_BUFFER_RO); si_init_buffer_resources(sctx, &sctx->rw_buffers[i], i == PIPE_SHADER_VERTEX ? - SI_RW_SO + 4 : SI_RW_SO, + SI_NUM_RW_BUFFERS : SI_NUM_RING_BUFFERS, i, SI_SGPR_RW_BUFFERS, RADEON_USAGE_READWRITE, RADEON_PRIO_SHADER_RESOURCE_RW); diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index b90c307887c..607d0690bac 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -146,7 +146,7 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, void * sctx->null_const_buf.buffer_size = sctx->null_const_buf.buffer->width0; for (shader = 0; shader < SI_NUM_SHADERS; shader++) { - for (i = 0; i < NUM_CONST_BUFFERS; i++) { + for (i = 0; i < SI_NUM_CONST_BUFFERS; i++) { sctx->b.b.set_constant_buffer(&sctx->b.b, shader, i, &sctx->null_const_buf); } @@ -347,7 +347,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH: return 32; case PIPE_SHADER_CAP_MAX_INPUTS: - return 32; + return shader == PIPE_SHADER_VERTEX ? SI_NUM_VERTEX_BUFFERS : 32; case PIPE_SHADER_CAP_MAX_TEMPS: return 256; /* Max native temporaries. */ case PIPE_SHADER_CAP_MAX_ADDRS: @@ -356,7 +356,7 @@ static int si_get_shader_param(struct pipe_screen* pscreen, unsigned shader, enu case PIPE_SHADER_CAP_MAX_CONSTS: return 4096; /* actually only memory limits this */ case PIPE_SHADER_CAP_MAX_CONST_BUFFERS: - return NUM_PIPE_CONST_BUFFERS; + return SI_NUM_USER_CONST_BUFFERS; case PIPE_SHADER_CAP_MAX_PREDS: return 0; /* FIXME */ case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED: diff --git a/src/gallium/drivers/radeonsi/si_pipe.h b/src/gallium/drivers/radeonsi/si_pipe.h index 9d33a92063b..9a6410b419d 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.h +++ b/src/gallium/drivers/radeonsi/si_pipe.h @@ -67,7 +67,7 @@ struct si_cs_shader_state { struct si_textures_info { struct si_sampler_views views; - struct si_pipe_sampler_state *samplers[NUM_TEX_UNITS]; + struct si_pipe_sampler_state *samplers[SI_NUM_USER_SAMPLERS]; unsigned n_views; uint32_t depth_texture_mask; /* which textures are depth */ uint32_t compressed_colortex_mask; @@ -88,8 +88,6 @@ struct si_framebuffer { #define SI_NUM_SHADERS (PIPE_SHADER_GEOMETRY+1) -#define SI_RW_SO 2 /* Streamout buffer descriptors after ring buffers */ - struct si_context { struct r600_common_context b; struct blitter_context *blitter; diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 5ac38cd9996..9ff08a59dfa 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -68,11 +68,11 @@ struct si_shader_context int param_vertex_id; int param_instance_id; LLVMValueRef const_md; - LLVMValueRef const_resource[NUM_CONST_BUFFERS]; + LLVMValueRef const_resource[SI_NUM_CONST_BUFFERS]; #if HAVE_LLVM >= 0x0304 LLVMValueRef ddxy_lds; #endif - LLVMValueRef *constants[NUM_CONST_BUFFERS]; + LLVMValueRef *constants[SI_NUM_CONST_BUFFERS]; LLVMValueRef *resources; LLVMValueRef *samplers; LLVMValueRef so_buffers[4]; @@ -580,7 +580,7 @@ static void declare_system_value( { LLVMBuilderRef builder = gallivm->builder; LLVMValueRef desc = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_CONST); - LLVMValueRef buf_index = lp_build_const_int32(gallivm, NUM_PIPE_CONST_BUFFERS); + LLVMValueRef buf_index = lp_build_const_int32(gallivm, SI_DRIVER_STATE_CONST_BUF); LLVMValueRef resource = build_indexed_load(si_shader_ctx, desc, buf_index); /* offset = sample_id * 8 (8 = 2 floats containing samplepos.xy) */ @@ -788,7 +788,7 @@ static void si_llvm_emit_clipvertex(struct lp_build_tgsi_context * bld_base, unsigned const_chan; LLVMValueRef base_elt; LLVMValueRef ptr = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_CONST); - LLVMValueRef constbuf_index = lp_build_const_int32(base->gallivm, NUM_PIPE_CONST_BUFFERS); + LLVMValueRef constbuf_index = lp_build_const_int32(base->gallivm, SI_DRIVER_STATE_CONST_BUF); LLVMValueRef const_resource = build_indexed_load(si_shader_ctx, ptr, constbuf_index); for (reg_index = 0; reg_index < 2; reg_index ++) { @@ -1751,7 +1751,7 @@ static void tex_fetch_args( txf_emit_data.dst_type = LLVMVectorType( LLVMInt32TypeInContext(gallivm->context), 4); txf_emit_data.args[0] = lp_build_gather_values(gallivm, txf_address, txf_count); - txf_emit_data.args[1] = si_shader_ctx->resources[FMASK_TEX_OFFSET + sampler_index]; + txf_emit_data.args[1] = si_shader_ctx->resources[SI_FMASK_TEX_OFFSET + sampler_index]; txf_emit_data.args[2] = lp_build_const_int32(gallivm, inst.Texture.Texture); txf_emit_data.arg_count = 3; @@ -1783,7 +1783,7 @@ static void tex_fetch_args( */ LLVMValueRef fmask_desc = LLVMBuildBitCast(gallivm->builder, - si_shader_ctx->resources[FMASK_TEX_OFFSET + sampler_index], + si_shader_ctx->resources[SI_FMASK_TEX_OFFSET + sampler_index], LLVMVectorType(uint_bld->elem_type, 8), ""); LLVMValueRef fmask_word1 = @@ -2328,14 +2328,14 @@ static void create_function(struct si_shader_context *si_shader_ctx) v8i32 = LLVMVectorType(i32, 8); v16i8 = LLVMVectorType(i8, 16); - params[SI_PARAM_CONST] = const_array(v16i8, NUM_CONST_BUFFERS); - params[SI_PARAM_RW_BUFFERS] = const_array(v16i8, 6); /* XXX hardcoded */ - params[SI_PARAM_SAMPLER] = const_array(v4i32, NUM_SAMPLER_STATES); - params[SI_PARAM_RESOURCE] = const_array(v8i32, NUM_SAMPLER_VIEWS); + params[SI_PARAM_CONST] = const_array(v16i8, SI_NUM_CONST_BUFFERS); + params[SI_PARAM_RW_BUFFERS] = const_array(v16i8, SI_NUM_RW_BUFFERS); + params[SI_PARAM_SAMPLER] = const_array(v4i32, SI_NUM_SAMPLER_STATES); + params[SI_PARAM_RESOURCE] = const_array(v8i32, SI_NUM_SAMPLER_VIEWS); switch (si_shader_ctx->type) { case TGSI_PROCESSOR_VERTEX: - params[SI_PARAM_VERTEX_BUFFER] = const_array(v16i8, 16); /* XXX hardcoded */ + params[SI_PARAM_VERTEX_BUFFER] = const_array(v16i8, SI_NUM_VERTEX_BUFFERS); params[SI_PARAM_START_INSTANCE] = i32; num_params = SI_PARAM_START_INSTANCE+1; if (shader->key.vs.as_es) { @@ -2454,7 +2454,7 @@ static void preload_constants(struct si_shader_context *si_shader_ctx) unsigned buf; LLVMValueRef ptr = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_CONST); - for (buf = 0; buf < NUM_CONST_BUFFERS; buf++) { + for (buf = 0; buf < SI_NUM_CONST_BUFFERS; buf++) { unsigned i, num_const = info->const_file_max[buf] + 1; if (num_const == 0) @@ -2493,7 +2493,7 @@ static void preload_samplers(struct si_shader_context *si_shader_ctx) return; /* Allocate space for the values */ - si_shader_ctx->resources = CALLOC(NUM_SAMPLER_VIEWS, sizeof(LLVMValueRef)); + si_shader_ctx->resources = CALLOC(SI_NUM_SAMPLER_VIEWS, sizeof(LLVMValueRef)); si_shader_ctx->samplers = CALLOC(num_samplers, sizeof(LLVMValueRef)); res_ptr = LLVMGetParam(si_shader_ctx->radeon_bld.main_fn, SI_PARAM_RESOURCE); @@ -2511,8 +2511,8 @@ static void preload_samplers(struct si_shader_context *si_shader_ctx) /* FMASK resource */ if (info->is_msaa_sampler[i]) { - offset = lp_build_const_int32(gallivm, FMASK_TEX_OFFSET + i); - si_shader_ctx->resources[FMASK_TEX_OFFSET + i] = + offset = lp_build_const_int32(gallivm, SI_FMASK_TEX_OFFSET + i); + si_shader_ctx->resources[SI_FMASK_TEX_OFFSET + i] = build_indexed_load(si_shader_ctx, res_ptr, offset); } } @@ -2536,7 +2536,7 @@ static void preload_streamout_buffers(struct si_shader_context *si_shader_ctx) for (i = 0; i < 4; ++i) { if (si_shader_ctx->shader->selector->so.stride[i]) { LLVMValueRef offset = lp_build_const_int32(gallivm, - SI_RW_SO + i); + SI_SO_BUF_OFFSET + i); si_shader_ctx->so_buffers[i] = build_indexed_load(si_shader_ctx, buf_ptr, offset); } @@ -2880,7 +2880,7 @@ int si_pipe_shader_create( tgsi_parse_free(&si_shader_ctx.parse); out: - for (int i = 0; i < NUM_CONST_BUFFERS; i++) + for (int i = 0; i < SI_NUM_CONST_BUFFERS; i++) FREE(si_shader_ctx.constants[i]); FREE(si_shader_ctx.resources); FREE(si_shader_ctx.samplers); diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c index cbd51ad3d1d..c64958a74ec 100644 --- a/src/gallium/drivers/radeonsi/si_state.c +++ b/src/gallium/drivers/radeonsi/si_state.c @@ -446,7 +446,7 @@ static void si_set_clip_state(struct pipe_context *ctx, cb.user_buffer = state->ucp; cb.buffer_offset = 0; cb.buffer_size = 4*4*8; - ctx->set_constant_buffer(ctx, PIPE_SHADER_VERTEX, NUM_PIPE_CONST_BUFFERS, &cb); + ctx->set_constant_buffer(ctx, PIPE_SHADER_VERTEX, SI_DRIVER_STATE_CONST_BUF, &cb); pipe_resource_reference(&cb.buffer, NULL); si_pm4_set_state(sctx, clip, pm4); @@ -1961,7 +1961,7 @@ static void si_set_framebuffer_state(struct pipe_context *ctx, } constbuf.buffer_size = sctx->framebuffer.nr_samples * 2 * 4; ctx->set_constant_buffer(ctx, PIPE_SHADER_FRAGMENT, - NUM_PIPE_CONST_BUFFERS, &constbuf); + SI_DRIVER_STATE_CONST_BUF, &constbuf); } static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom *atom) @@ -2710,7 +2710,7 @@ static void si_set_sampler_views(struct pipe_context *ctx, samplers->depth_texture_mask &= ~(1 << i); samplers->compressed_colortex_mask &= ~(1 << i); si_set_sampler_view(sctx, shader, i, NULL, NULL); - si_set_sampler_view(sctx, shader, FMASK_TEX_OFFSET + i, + si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + i, NULL, NULL); continue; } @@ -2733,10 +2733,10 @@ static void si_set_sampler_views(struct pipe_context *ctx, } if (rtex->fmask.size) { - si_set_sampler_view(sctx, shader, FMASK_TEX_OFFSET + i, + si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + i, views[i], rviews[i]->fmask_state); } else { - si_set_sampler_view(sctx, shader, FMASK_TEX_OFFSET + i, + si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + i, NULL, NULL); } } @@ -2745,7 +2745,7 @@ static void si_set_sampler_views(struct pipe_context *ctx, samplers->depth_texture_mask &= ~(1 << i); samplers->compressed_colortex_mask &= ~(1 << i); si_set_sampler_view(sctx, shader, i, NULL, NULL); - si_set_sampler_view(sctx, shader, FMASK_TEX_OFFSET + i, + si_set_sampler_view(sctx, shader, SI_FMASK_TEX_OFFSET + i, NULL, NULL); } diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h index c051d73aa42..fc3b1b97ea1 100644 --- a/src/gallium/drivers/radeonsi/si_state.h +++ b/src/gallium/drivers/radeonsi/si_state.h @@ -106,20 +106,35 @@ union si_state { struct si_pm4_state *array[0]; }; -#define NUM_TEX_UNITS 16 +#define SI_NUM_USER_SAMPLERS 16 /* AKA OpenGL textures units per shader */ /* User sampler views: 0..15 * FMASK sampler views: 16..31 (no sampler states) */ -#define FMASK_TEX_OFFSET NUM_TEX_UNITS -#define NUM_SAMPLER_VIEWS (FMASK_TEX_OFFSET+NUM_TEX_UNITS) -#define NUM_SAMPLER_STATES NUM_TEX_UNITS +#define SI_FMASK_TEX_OFFSET SI_NUM_USER_SAMPLERS +#define SI_NUM_SAMPLER_VIEWS (SI_FMASK_TEX_OFFSET + SI_NUM_USER_SAMPLERS) +#define SI_NUM_SAMPLER_STATES SI_NUM_USER_SAMPLERS -#define NUM_PIPE_CONST_BUFFERS 16 -#define NUM_CONST_BUFFERS (NUM_PIPE_CONST_BUFFERS + 1) +/* User constant buffers: 0..15 + * Driver state constants: 16 + */ +#define SI_NUM_USER_CONST_BUFFERS 16 +#define SI_DRIVER_STATE_CONST_BUF SI_NUM_USER_CONST_BUFFERS +#define SI_NUM_CONST_BUFFERS (SI_DRIVER_STATE_CONST_BUF + 1) +/* Read-write buffer slots. + * + * Ring buffers: 0..1 + * Streamout buffers: 2..5 + */ #define SI_RING_ESGS 0 #define SI_RING_GSVS 1 +#define SI_NUM_RING_BUFFERS 2 +#define SI_SO_BUF_OFFSET SI_NUM_RING_BUFFERS +#define SI_NUM_RW_BUFFERS (SI_SO_BUF_OFFSET + 4) + +#define SI_NUM_VERTEX_BUFFERS 16 + /* This represents resource descriptors in memory, such as buffer resources, * image resources, and sampler states. @@ -155,8 +170,8 @@ struct si_descriptors { struct si_sampler_views { struct si_descriptors desc; - struct pipe_sampler_view *views[NUM_SAMPLER_VIEWS]; - uint32_t *desc_data[NUM_SAMPLER_VIEWS]; + struct pipe_sampler_view *views[SI_NUM_SAMPLER_VIEWS]; + uint32_t *desc_data[SI_NUM_SAMPLER_VIEWS]; }; struct si_buffer_resources { |