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-rw-r--r--src/gallium/drivers/virgl/virgl_encode.c2
-rw-r--r--src/gallium/drivers/virgl/virgl_hw.h1
-rw-r--r--src/gallium/drivers/virgl/virgl_screen.c3
-rw-r--r--src/gallium/drivers/virgl/virgl_streamout.c5
4 files changed, 8 insertions, 3 deletions
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index 190c338f458..c09eb5a6382 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -880,7 +880,7 @@ int virgl_encoder_set_so_targets(struct virgl_context *ctx,
virgl_encoder_write_dword(ctx->cbuf, append_bitmask);
for (i = 0; i < num_targets; i++) {
struct virgl_so_target *tg = virgl_so_target(targets[i]);
- virgl_encoder_write_dword(ctx->cbuf, tg->handle);
+ virgl_encoder_write_dword(ctx->cbuf, tg ? tg->handle : 0);
}
return 0;
}
diff --git a/src/gallium/drivers/virgl/virgl_hw.h b/src/gallium/drivers/virgl/virgl_hw.h
index 787452d3287..9a358dd8445 100644
--- a/src/gallium/drivers/virgl/virgl_hw.h
+++ b/src/gallium/drivers/virgl/virgl_hw.h
@@ -230,6 +230,7 @@ enum virgl_formats {
#define VIRGL_CAP_TGSI_FBFETCH (1 << 10)
#define VIRGL_CAP_SHADER_CLOCK (1 << 11)
#define VIRGL_CAP_TEXTURE_BARRIER (1 << 12)
+#define VIRGL_CAP_TGSI_COMPONENTS (1 << 13)
/* virgl bind flags - these are compatible with mesa 10.5 gallium.
* but are fixed, no other should be passed to virgl either.
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index 86063c66aaf..7df865eb123 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -236,6 +236,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_FBFETCH;
case PIPE_CAP_TGSI_CLOCK:
return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_SHADER_CLOCK;
+ case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
+ return vscreen->caps.caps.v2.capability_bits & VIRGL_CAP_TGSI_COMPONENTS;
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_FAKE_SW_MSAA:
@@ -272,7 +274,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MAX_WINDOW_RECTANGLES:
case PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED:
case PIPE_CAP_VIEWPORT_SUBPIXEL_BITS:
- case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
case PIPE_CAP_TGSI_CAN_READ_OUTPUTS:
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_TGSI_MUL_ZERO_WINS:
diff --git a/src/gallium/drivers/virgl/virgl_streamout.c b/src/gallium/drivers/virgl/virgl_streamout.c
index b6a65fff29e..0fc3af67959 100644
--- a/src/gallium/drivers/virgl/virgl_streamout.c
+++ b/src/gallium/drivers/virgl/virgl_streamout.c
@@ -72,7 +72,10 @@ static void virgl_set_so_targets(struct pipe_context *ctx,
struct virgl_context *vctx = virgl_context(ctx);
int i;
for (i = 0; i < num_targets; i++) {
- pipe_resource_reference(&vctx->so_targets[i].base.buffer, targets[i]->buffer);
+ if (targets[i])
+ pipe_resource_reference(&vctx->so_targets[i].base.buffer, targets[i]->buffer);
+ else
+ pipe_resource_reference(&vctx->so_targets[i].base.buffer, NULL);
}
for (i = num_targets; i < vctx->num_so_targets; i++)
pipe_resource_reference(&vctx->so_targets[i].base.buffer, NULL);