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-rw-r--r--src/gallium/drivers/vc4/vc4_blit.c1
-rw-r--r--src/gallium/drivers/vc4/vc4_context.c9
-rw-r--r--src/gallium/drivers/vc4/vc4_job.c58
3 files changed, 37 insertions, 31 deletions
diff --git a/src/gallium/drivers/vc4/vc4_blit.c b/src/gallium/drivers/vc4/vc4_blit.c
index 83e1e00ec41..d3fc8e922ad 100644
--- a/src/gallium/drivers/vc4/vc4_blit.c
+++ b/src/gallium/drivers/vc4/vc4_blit.c
@@ -149,6 +149,7 @@ vc4_tile_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
job->tile_height = tile_height;
job->msaa = msaa;
job->needs_flush = true;
+ job->resolve |= PIPE_CLEAR_COLOR;
vc4_job_submit(vc4, job);
diff --git a/src/gallium/drivers/vc4/vc4_context.c b/src/gallium/drivers/vc4/vc4_context.c
index 1a212e4aba4..37b002d5cba 100644
--- a/src/gallium/drivers/vc4/vc4_context.c
+++ b/src/gallium/drivers/vc4/vc4_context.c
@@ -52,10 +52,7 @@ vc4_flush(struct pipe_context *pctx)
pipe_surface_reference(&job->color_write, cbuf);
}
- if (!(job->cleared & PIPE_CLEAR_COLOR0)) {
- pipe_surface_reference(&job->color_read, cbuf);
- }
-
+ pipe_surface_reference(&job->color_read, cbuf);
}
if (zsbuf && (job->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
@@ -65,9 +62,7 @@ vc4_flush(struct pipe_context *pctx)
pipe_surface_reference(&job->zs_write, zsbuf);
}
- if (!(job->cleared & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
- pipe_surface_reference(&job->zs_read, zsbuf);
- }
+ pipe_surface_reference(&job->zs_read, zsbuf);
}
vc4_job_submit(vc4, job);
diff --git a/src/gallium/drivers/vc4/vc4_job.c b/src/gallium/drivers/vc4/vc4_job.c
index 0ed2d3c0443..cb20853fa49 100644
--- a/src/gallium/drivers/vc4/vc4_job.c
+++ b/src/gallium/drivers/vc4/vc4_job.c
@@ -81,10 +81,8 @@ vc4_submit_setup_rcl_surface(struct vc4_job *job,
{
struct vc4_surface *surf = vc4_surface(psurf);
- if (!surf) {
- submit_surf->hindex = ~0;
+ if (!surf)
return;
- }
struct vc4_resource *rsc = vc4_resource(psurf->texture);
submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
@@ -124,10 +122,8 @@ vc4_submit_setup_rcl_render_config_surface(struct vc4_job *job,
{
struct vc4_surface *surf = vc4_surface(psurf);
- if (!surf) {
- submit_surf->hindex = ~0;
+ if (!surf)
return;
- }
struct vc4_resource *rsc = vc4_resource(psurf->texture);
submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
@@ -153,10 +149,8 @@ vc4_submit_setup_rcl_msaa_surface(struct vc4_job *job,
{
struct vc4_surface *surf = vc4_surface(psurf);
- if (!surf) {
- submit_surf->hindex = ~0;
+ if (!surf)
return;
- }
struct vc4_resource *rsc = vc4_resource(psurf->texture);
submit_surf->hindex = vc4_gem_hindex(job, rsc->bo);
@@ -202,25 +196,41 @@ vc4_job_submit(struct vc4_context *vc4, struct vc4_job *job)
cl_u8(&bcl, VC4_PACKET_FLUSH);
cl_end(&job->bcl, bcl);
}
- struct drm_vc4_submit_cl submit;
- memset(&submit, 0, sizeof(submit));
+ struct drm_vc4_submit_cl submit = {
+ .color_read.hindex = ~0,
+ .zs_read.hindex = ~0,
+ .color_write.hindex = ~0,
+ .msaa_color_write.hindex = ~0,
+ .zs_write.hindex = ~0,
+ .msaa_zs_write.hindex = ~0,
+ };
cl_ensure_space(&job->bo_handles, 6 * sizeof(uint32_t));
cl_ensure_space(&job->bo_pointers, 6 * sizeof(struct vc4_bo *));
- vc4_submit_setup_rcl_surface(job, &submit.color_read,
- job->color_read, false, false);
- vc4_submit_setup_rcl_render_config_surface(job, &submit.color_write,
- job->color_write);
- vc4_submit_setup_rcl_surface(job, &submit.zs_read,
- job->zs_read, true, false);
- vc4_submit_setup_rcl_surface(job, &submit.zs_write,
- job->zs_write, true, true);
-
- vc4_submit_setup_rcl_msaa_surface(job, &submit.msaa_color_write,
- job->msaa_color_write);
- vc4_submit_setup_rcl_msaa_surface(job, &submit.msaa_zs_write,
- job->msaa_zs_write);
+ if (job->resolve & PIPE_CLEAR_COLOR) {
+ if (!(job->cleared & PIPE_CLEAR_COLOR)) {
+ vc4_submit_setup_rcl_surface(job, &submit.color_read,
+ job->color_read,
+ false, false);
+ }
+ vc4_submit_setup_rcl_render_config_surface(job,
+ &submit.color_write,
+ job->color_write);
+ vc4_submit_setup_rcl_msaa_surface(job,
+ &submit.msaa_color_write,
+ job->msaa_color_write);
+ }
+ if (job->resolve & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL)) {
+ if (!(job->cleared & (PIPE_CLEAR_DEPTH | PIPE_CLEAR_STENCIL))) {
+ vc4_submit_setup_rcl_surface(job, &submit.zs_read,
+ job->zs_read, true, false);
+ }
+ vc4_submit_setup_rcl_surface(job, &submit.zs_write,
+ job->zs_write, true, true);
+ vc4_submit_setup_rcl_msaa_surface(job, &submit.msaa_zs_write,
+ job->msaa_zs_write);
+ }
if (job->msaa) {
/* This bit controls how many pixels the general