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Diffstat (limited to 'src/gallium/drivers/vc4/vc4_draw.c')
-rw-r--r--src/gallium/drivers/vc4/vc4_draw.c53
1 files changed, 48 insertions, 5 deletions
diff --git a/src/gallium/drivers/vc4/vc4_draw.c b/src/gallium/drivers/vc4/vc4_draw.c
index a4e5e092b1a..624a236c573 100644
--- a/src/gallium/drivers/vc4/vc4_draw.c
+++ b/src/gallium/drivers/vc4/vc4_draw.c
@@ -25,6 +25,7 @@
#include "util/u_prim.h"
#include "util/u_format.h"
#include "util/u_pack_color.h"
+#include "util/u_upload_mgr.h"
#include "indices/u_primconvert.h"
#include "vc4_context.h"
@@ -100,7 +101,7 @@ vc4_start_draw(struct vc4_context *vc4)
VC4_PRIMITIVE_LIST_FORMAT_TYPE_TRIANGLES));
vc4->needs_flush = true;
- vc4->draw_call_queued = true;
+ vc4->draw_calls_queued++;
vc4->draw_width = width;
vc4->draw_height = height;
@@ -226,6 +227,38 @@ vc4_emit_gl_shader_state(struct vc4_context *vc4, const struct pipe_draw_info *i
vc4->max_index = max_index;
}
+/**
+ * HW-2116 workaround: Flush the batch before triggering the hardware state
+ * counter wraparound behavior.
+ *
+ * State updates are tracked by a global counter which increments at the first
+ * state update after a draw or a START_BINNING. Tiles can then have their
+ * state updated at draw time with a set of cheap checks for whether the
+ * state's copy of the global counter matches the global counter the last time
+ * that state was written to the tile.
+ *
+ * The state counters are relatively small and wrap around quickly, so you
+ * could get false negatives for needing to update a particular state in the
+ * tile. To avoid this, the hardware attempts to write all of the state in
+ * the tile at wraparound time. This apparently is broken, so we just flush
+ * everything before that behavior is triggered. A batch flush is sufficient
+ * to get our current contents drawn and reset the counters to 0.
+ *
+ * Note that we can't just use VC4_PACKET_FLUSH_ALL, because that caps the
+ * tiles with VC4_PACKET_RETURN_FROM_LIST.
+ */
+static void
+vc4_hw_2116_workaround(struct pipe_context *pctx)
+{
+ struct vc4_context *vc4 = vc4_context(pctx);
+
+ if (vc4->draw_calls_queued == 0x1ef0) {
+ perf_debug("Flushing batch due to HW-2116 workaround "
+ "(too many draw calls per scene\n");
+ vc4_flush(pctx);
+ }
+}
+
static void
vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
{
@@ -244,6 +277,8 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
vc4_update_shadow_textures(pctx, &vc4->verttex);
vc4_update_shadow_textures(pctx, &vc4->fragtex);
+ vc4_hw_2116_workaround(pctx);
+
vc4_get_draw_cl_space(vc4);
if (vc4->prim_mode != info->mode) {
@@ -285,7 +320,15 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
info->count, &offset);
index_size = 2;
} else {
- prsc = vc4->indexbuf.buffer;
+ if (vc4->indexbuf.user_buffer) {
+ prsc = NULL;
+ u_upload_data(vc4->uploader, 0,
+ info->count * index_size,
+ vc4->indexbuf.user_buffer,
+ &offset, &prsc);
+ } else {
+ prsc = vc4->indexbuf.buffer;
+ }
}
struct vc4_resource *rsc = vc4_resource(prsc);
@@ -300,7 +343,7 @@ vc4_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
cl_reloc(vc4, &vc4->bcl, &bcl, rsc->bo, offset);
cl_u32(&bcl, vc4->max_index);
- if (vc4->indexbuf.index_size == 4)
+ if (vc4->indexbuf.index_size == 4 || vc4->indexbuf.user_buffer)
pipe_resource_reference(&prsc, NULL);
} else {
cl_u8(&bcl, VC4_PACKET_GL_ARRAY_PRIMITIVE);
@@ -343,8 +386,8 @@ vc4_clear(struct pipe_context *pctx, unsigned buffers,
/* We can't flag new buffers for clearing once we've queued draws. We
* could avoid this by using the 3d engine to clear.
*/
- if (vc4->draw_call_queued) {
- perf_debug("Flushing rendering to process new clear.");
+ if (vc4->draw_calls_queued) {
+ perf_debug("Flushing rendering to process new clear.\n");
vc4_flush(pctx);
}