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-rw-r--r--src/gallium/drivers/radeonsi/si_pipe.c24
1 files changed, 18 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c
index 2c65cc886fb..cac1d015593 100644
--- a/src/gallium/drivers/radeonsi/si_pipe.c
+++ b/src/gallium/drivers/radeonsi/si_pipe.c
@@ -201,12 +201,24 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen,
sctx->b.gfx.cs = ws->cs_create(sctx->b.ctx, RING_GFX,
si_context_gfx_flush, sctx);
- /* SI + AMDGPU + CE = GPU hang */
- if (!(sscreen->b.debug_flags & DBG_NO_CE) && ws->cs_add_const_ib &&
- sscreen->b.chip_class != SI &&
- /* These can't use CE due to a power gating bug in the kernel. */
- sscreen->b.family != CHIP_CARRIZO &&
- sscreen->b.family != CHIP_STONEY) {
+ bool enable_ce = sscreen->b.chip_class != SI && /* SI hangs */
+ /* These can't use CE due to a power gating bug in the kernel. */
+ sscreen->b.family != CHIP_CARRIZO &&
+ sscreen->b.family != CHIP_STONEY;
+
+ /* CE is currently disabled by default, because it makes s_load latency
+ * worse, because CE IB doesn't run in lockstep with DE.
+ * Remove this line after that performance issue has been resolved.
+ */
+ enable_ce = false;
+
+ /* Apply CE overrides. */
+ if (sscreen->b.debug_flags & DBG_NO_CE)
+ enable_ce = false;
+ else if (sscreen->b.debug_flags & DBG_CE)
+ enable_ce = true;
+
+ if (ws->cs_add_const_ib && enable_ce) {
sctx->ce_ib = ws->cs_add_const_ib(sctx->b.gfx.cs);
if (!sctx->ce_ib)
goto fail;