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-rw-r--r--src/gallium/drivers/radeonsi/si_gfx_cs.c1
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c8
-rw-r--r--src/gallium/drivers/radeonsi/si_state.h2
-rw-r--r--src/gallium/drivers/radeonsi/si_state_viewport.c6
4 files changed, 11 insertions, 6 deletions
diff --git a/src/gallium/drivers/radeonsi/si_gfx_cs.c b/src/gallium/drivers/radeonsi/si_gfx_cs.c
index 474ffb547ac..f178d044583 100644
--- a/src/gallium/drivers/radeonsi/si_gfx_cs.c
+++ b/src/gallium/drivers/radeonsi/si_gfx_cs.c
@@ -350,6 +350,7 @@ void si_begin_new_gfx_cs(struct si_context *ctx)
ctx->tracked_regs.reg_value[SI_TRACKED_PA_CL_GB_HORZ_CLIP_ADJ] = 0x3f800000;
ctx->tracked_regs.reg_value[SI_TRACKED_PA_CL_GB_HORZ_DISC_ADJ] = 0x3f800000;
ctx->tracked_regs.reg_value[SI_TRACKED_PA_SU_HARDWARE_SCREEN_OFFSET] = 0;
+ ctx->tracked_regs.reg_value[SI_TRACKED_PA_SU_VTX_CNTL] = 0x00000005;
ctx->tracked_regs.reg_value[SI_TRACKED_PA_SC_CLIPRECT_RULE] = 0xffff;
ctx->tracked_regs.reg_value[SI_TRACKED_VGT_ESGS_RING_ITEMSIZE] = 0x00000000;
ctx->tracked_regs.reg_value[SI_TRACKED_VGT_GSVS_RING_OFFSET_1] = 0x00000000;
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index b1e2fc30e2a..827d8495006 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -852,6 +852,7 @@ static void *si_create_rs_state(struct pipe_context *ctx,
rs->multisample_enable = state->multisample;
rs->force_persample_interp = state->force_persample_interp;
rs->clip_plane_enable = state->clip_plane_enable;
+ rs->half_pixel_center = state->half_pixel_center;
rs->line_stipple_enable = state->line_stipple_enable;
rs->poly_stipple_enable = state->poly_stipple_enable;
rs->line_smooth = state->line_smooth;
@@ -912,10 +913,6 @@ static void *si_create_rs_state(struct pipe_context *ctx,
S_028A48_VPORT_SCISSOR_ENABLE(1) |
S_028A48_ALTERNATE_RBS_PER_TILE(sscreen->info.chip_class >= GFX9));
- si_pm4_set_reg(pm4, R_028BE4_PA_SU_VTX_CNTL,
- S_028BE4_PIX_CENTER(state->half_pixel_center) |
- S_028BE4_QUANT_MODE(V_028BE4_X_16_8_FIXED_POINT_1_256TH));
-
si_pm4_set_reg(pm4, R_028B7C_PA_SU_POLY_OFFSET_CLAMP, fui(state->offset_clamp));
si_pm4_set_reg(pm4, R_028814_PA_SU_SC_MODE_CNTL,
S_028814_PROVOKING_VTX_LAST(!state->flatshade_first) |
@@ -1014,7 +1011,8 @@ static void si_bind_rs_state(struct pipe_context *ctx, void *state)
if (!old_rs ||
old_rs->line_width != rs->line_width ||
- old_rs->max_point_size != rs->max_point_size)
+ old_rs->max_point_size != rs->max_point_size ||
+ old_rs->half_pixel_center != rs->half_pixel_center)
si_mark_atom_dirty(sctx, &sctx->atoms.s.guardband);
if (!old_rs ||
diff --git a/src/gallium/drivers/radeonsi/si_state.h b/src/gallium/drivers/radeonsi/si_state.h
index c3b56ff12f8..16fd223d00a 100644
--- a/src/gallium/drivers/radeonsi/si_state.h
+++ b/src/gallium/drivers/radeonsi/si_state.h
@@ -71,6 +71,7 @@ struct si_state_rasterizer {
float max_point_size;
unsigned sprite_coord_enable:8;
unsigned clip_plane_enable:8;
+ unsigned half_pixel_center:1;
unsigned flatshade:1;
unsigned two_side:1;
unsigned multisample_enable:1;
@@ -277,6 +278,7 @@ enum si_tracked_reg {
SI_TRACKED_PA_CL_GB_HORZ_DISC_ADJ,
SI_TRACKED_PA_SU_HARDWARE_SCREEN_OFFSET,
+ SI_TRACKED_PA_SU_VTX_CNTL,
SI_TRACKED_PA_SC_CLIPRECT_RULE,
diff --git a/src/gallium/drivers/radeonsi/si_state_viewport.c b/src/gallium/drivers/radeonsi/si_state_viewport.c
index 335d63b1814..c69a56dffae 100644
--- a/src/gallium/drivers/radeonsi/si_state_viewport.c
+++ b/src/gallium/drivers/radeonsi/si_state_viewport.c
@@ -150,6 +150,7 @@ static void si_emit_one_scissor(struct si_context *ctx,
static void si_emit_guardband(struct si_context *ctx)
{
+ const struct si_state_rasterizer *rs = ctx->queued.named.rasterizer;
struct si_signed_scissor vp_as_scissor;
struct pipe_viewport_state vp;
float left, top, right, bottom, max_range, guardband_x, guardband_y;
@@ -229,7 +230,6 @@ static void si_emit_guardband(struct si_context *ctx)
if (unlikely(util_prim_is_points_or_lines(ctx->current_rast_prim))) {
/* When rendering wide points or lines, we need to be more
* conservative about when to discard them entirely. */
- const struct si_state_rasterizer *rs = ctx->queued.named.rasterizer;
float pixels;
if (ctx->current_rast_prim == PIPE_PRIM_POINTS)
@@ -259,6 +259,10 @@ static void si_emit_guardband(struct si_context *ctx)
SI_TRACKED_PA_SU_HARDWARE_SCREEN_OFFSET,
S_028234_HW_SCREEN_OFFSET_X(hw_screen_offset_x >> 4) |
S_028234_HW_SCREEN_OFFSET_Y(hw_screen_offset_y >> 4));
+ radeon_opt_set_context_reg(ctx, R_028BE4_PA_SU_VTX_CNTL,
+ SI_TRACKED_PA_SU_VTX_CNTL,
+ S_028BE4_PIX_CENTER(rs->half_pixel_center) |
+ S_028BE4_QUANT_MODE(V_028BE4_X_16_8_FIXED_POINT_1_256TH));
}
static void si_emit_scissors(struct si_context *ctx)