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-rw-r--r--src/gallium/drivers/radeonsi/si_blit.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_descriptors.c4
-rw-r--r--src/gallium/drivers/radeonsi/si_state.c2
3 files changed, 5 insertions, 5 deletions
diff --git a/src/gallium/drivers/radeonsi/si_blit.c b/src/gallium/drivers/radeonsi/si_blit.c
index db41f565a94..0f46d71ddaf 100644
--- a/src/gallium/drivers/radeonsi/si_blit.c
+++ b/src/gallium/drivers/radeonsi/si_blit.c
@@ -429,7 +429,7 @@ static void si_blit_decompress_color(struct pipe_context *ctx,
/* disable levels without DCC */
for (int i = first_level; i <= last_level; i++) {
if (!rtex->dcc_offset ||
- !rtex->surface.level[i].dcc_enabled)
+ i >= rtex->surface.num_dcc_levels)
level_mask &= ~(1 << i);
}
} else if (rtex->fmask.size) {
@@ -1029,7 +1029,7 @@ static bool do_hardware_msaa_resolve(struct pipe_context *ctx,
* This is still the fastest codepath even with this clear.
*/
if (dst->dcc_offset &&
- dst->surface.level[info->dst.level].dcc_enabled) {
+ info->dst.level < dst->surface.num_dcc_levels) {
vi_dcc_clear_level(&sctx->b, dst, info->dst.level,
0xFFFFFFFF);
dst->dirty_level_mask &= ~(1 << info->dst.level);
diff --git a/src/gallium/drivers/radeonsi/si_descriptors.c b/src/gallium/drivers/radeonsi/si_descriptors.c
index 19cae65e75e..9358542ac78 100644
--- a/src/gallium/drivers/radeonsi/si_descriptors.c
+++ b/src/gallium/drivers/radeonsi/si_descriptors.c
@@ -394,7 +394,7 @@ void si_set_mutable_tex_desc_fields(struct r600_texture *tex,
is_stencil));
state[4] |= S_008F20_PITCH(pitch - 1);
- if (tex->dcc_offset && tex->surface.level[first_level].dcc_enabled) {
+ if (tex->dcc_offset && first_level < tex->surface.num_dcc_levels) {
state[6] |= S_008F28_COMPRESSION_EN(1);
state[7] = ((!tex->dcc_separate_buffer ? tex->resource.gpu_address : 0) +
tex->dcc_offset +
@@ -669,7 +669,7 @@ static void si_set_shader_image(struct si_context *ctx,
unsigned level = view->u.tex.level;
unsigned width, height, depth;
bool uses_dcc = tex->dcc_offset &&
- tex->surface.level[level].dcc_enabled;
+ level < tex->surface.num_dcc_levels;
assert(!tex->is_depth);
assert(tex->fmask.size == 0);
diff --git a/src/gallium/drivers/radeonsi/si_state.c b/src/gallium/drivers/radeonsi/si_state.c
index 0633b64de33..bf89d8bf1f2 100644
--- a/src/gallium/drivers/radeonsi/si_state.c
+++ b/src/gallium/drivers/radeonsi/si_state.c
@@ -2500,7 +2500,7 @@ static void si_emit_framebuffer_state(struct si_context *sctx, struct r600_atom
cb_color_info = cb->cb_color_info | tex->cb_color_info;
- if (tex->dcc_offset && cb->level_info->dcc_enabled) {
+ if (tex->dcc_offset && cb->base.u.tex.level < tex->surface.num_dcc_levels) {
bool is_msaa_resolve_dst = state->cbufs[0] &&
state->cbufs[0]->texture->nr_samples > 1 &&
state->cbufs[1] == &cb->base &&