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Diffstat (limited to 'src/gallium/drivers/radeonsi/si_state_draw.c')
-rw-r--r--src/gallium/drivers/radeonsi/si_state_draw.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index dfe423610bf..52546451bc7 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1409,6 +1409,7 @@ void si_trace_emit(struct si_context *sctx)
sctx->trace_id++;
radeon_add_to_buffer_list(&sctx->b, &sctx->b.gfx, sctx->trace_buf,
RADEON_USAGE_READWRITE, RADEON_PRIO_TRACE);
+
radeon_emit(cs, PKT3(PKT3_WRITE_DATA, 3, 0));
radeon_emit(cs, S_370_DST_SEL(V_370_MEMORY_SYNC) |
S_370_WR_CONFIRM(1) |
@@ -1418,4 +1419,18 @@ void si_trace_emit(struct si_context *sctx)
radeon_emit(cs, sctx->trace_id);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0));
radeon_emit(cs, AC_ENCODE_TRACE_POINT(sctx->trace_id));
+
+ if (sctx->ce_ib) {
+ struct radeon_winsys_cs *ce = sctx->ce_ib;
+
+ radeon_emit(ce, PKT3(PKT3_WRITE_DATA, 3, 0));
+ radeon_emit(ce, S_370_DST_SEL(V_370_MEM_ASYNC) |
+ S_370_WR_CONFIRM(1) |
+ S_370_ENGINE_SEL(V_370_CE));
+ radeon_emit(ce, sctx->trace_buf->gpu_address + 4);
+ radeon_emit(ce, (sctx->trace_buf->gpu_address + 4) >> 32);
+ radeon_emit(ce, sctx->trace_id);
+ radeon_emit(ce, PKT3(PKT3_NOP, 0, 0));
+ radeon_emit(ce, AC_ENCODE_TRACE_POINT(sctx->trace_id));
+ }
}