diff options
Diffstat (limited to 'src/gallium/drivers/radeonsi/si_pipe.c')
-rw-r--r-- | src/gallium/drivers/radeonsi/si_pipe.c | 147 |
1 files changed, 145 insertions, 2 deletions
diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index 06d5642d1c4..d230d28dd55 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -34,6 +34,7 @@ #include "util/u_memory.h" #include "util/u_suballoc.h" #include "util/u_tests.h" +#include "util/u_upload_mgr.h" #include "util/xmlconfig.h" #include "vl/vl_decoder.h" #include "../ddebug/dd_util.h" @@ -160,7 +161,44 @@ static void si_destroy_context(struct pipe_context *context) if (sctx->blitter) util_blitter_destroy(sctx->blitter); - si_common_context_cleanup(sctx); + /* Release DCC stats. */ + for (int i = 0; i < ARRAY_SIZE(sctx->b.dcc_stats); i++) { + assert(!sctx->b.dcc_stats[i].query_active); + + for (int j = 0; j < ARRAY_SIZE(sctx->b.dcc_stats[i].ps_stats); j++) + if (sctx->b.dcc_stats[i].ps_stats[j]) + sctx->b.b.destroy_query(&sctx->b.b, + sctx->b.dcc_stats[i].ps_stats[j]); + + r600_texture_reference(&sctx->b.dcc_stats[i].tex, NULL); + } + + if (sctx->b.query_result_shader) + sctx->b.b.delete_compute_state(&sctx->b.b, sctx->b.query_result_shader); + + if (sctx->b.gfx_cs) + sctx->b.ws->cs_destroy(sctx->b.gfx_cs); + if (sctx->b.dma_cs) + sctx->b.ws->cs_destroy(sctx->b.dma_cs); + if (sctx->b.ctx) + sctx->b.ws->ctx_destroy(sctx->b.ctx); + + if (sctx->b.b.stream_uploader) + u_upload_destroy(sctx->b.b.stream_uploader); + if (sctx->b.b.const_uploader) + u_upload_destroy(sctx->b.b.const_uploader); + if (sctx->b.cached_gtt_allocator) + u_upload_destroy(sctx->b.cached_gtt_allocator); + + slab_destroy_child(&sctx->b.pool_transfers); + slab_destroy_child(&sctx->b.pool_transfers_unsync); + + if (sctx->b.allocator_zeroed_memory) + u_suballocator_destroy(sctx->b.allocator_zeroed_memory); + + sctx->b.ws->fence_reference(&sctx->b.last_gfx_fence, NULL); + sctx->b.ws->fence_reference(&sctx->b.last_sdma_fence, NULL); + r600_resource_reference(&sctx->b.eop_bug_scratch, NULL); LLVMDisposeTargetMachine(sctx->tm); @@ -185,6 +223,49 @@ si_amdgpu_get_reset_status(struct pipe_context *ctx) return sctx->b.ws->ctx_query_reset_status(sctx->b.ctx); } +static enum pipe_reset_status si_get_reset_status(struct pipe_context *ctx) +{ + struct si_context *sctx = (struct si_context *)ctx; + unsigned latest = sctx->b.ws->query_value(sctx->b.ws, + RADEON_GPU_RESET_COUNTER); + + if (sctx->b.gpu_reset_counter == latest) + return PIPE_NO_RESET; + + sctx->b.gpu_reset_counter = latest; + return PIPE_UNKNOWN_CONTEXT_RESET; +} + +static void si_set_device_reset_callback(struct pipe_context *ctx, + const struct pipe_device_reset_callback *cb) +{ + struct si_context *sctx = (struct si_context *)ctx; + + if (cb) + sctx->b.device_reset_callback = *cb; + else + memset(&sctx->b.device_reset_callback, 0, + sizeof(sctx->b.device_reset_callback)); +} + +bool si_check_device_reset(struct si_context *sctx) +{ + enum pipe_reset_status status; + + if (!sctx->b.device_reset_callback.reset) + return false; + + if (!sctx->b.b.get_device_reset_status) + return false; + + status = sctx->b.b.get_device_reset_status(&sctx->b.b); + if (status == PIPE_NO_RESET) + return false; + + sctx->b.device_reset_callback.reset(sctx->b.device_reset_callback.data, status); + return true; +} + /* Apitrace profiling: * 1) qapitrace : Tools -> Profile: Measure CPU & GPU times * 2) In the middle panel, zoom in (mouse wheel) on some bad draw call @@ -264,9 +345,71 @@ static struct pipe_context *si_create_context(struct pipe_screen *screen, sctx->screen = sscreen; /* Easy accessing of screen/winsys. */ sctx->is_debug = (flags & PIPE_CONTEXT_DEBUG) != 0; - if (!si_common_context_init(sctx, sscreen, flags)) + slab_create_child(&sctx->b.pool_transfers, &sscreen->pool_transfers); + slab_create_child(&sctx->b.pool_transfers_unsync, &sscreen->pool_transfers); + + sctx->b.screen = sscreen; + sctx->b.ws = sscreen->ws; + sctx->b.family = sscreen->info.family; + sctx->b.chip_class = sscreen->info.chip_class; + + if (sscreen->info.drm_major == 2 && sscreen->info.drm_minor >= 43) { + sctx->b.b.get_device_reset_status = si_get_reset_status; + sctx->b.gpu_reset_counter = + sctx->b.ws->query_value(sctx->b.ws, + RADEON_GPU_RESET_COUNTER); + } + + sctx->b.b.set_device_reset_callback = si_set_device_reset_callback; + + si_init_context_texture_functions(sctx); + si_init_query_functions(sctx); + + if (sctx->b.chip_class == CIK || + sctx->b.chip_class == VI || + sctx->b.chip_class == GFX9) { + sctx->b.eop_bug_scratch = (struct r600_resource*) + pipe_buffer_create(&sscreen->b, 0, PIPE_USAGE_DEFAULT, + 16 * sscreen->info.num_render_backends); + if (!sctx->b.eop_bug_scratch) + goto fail; + } + + sctx->b.allocator_zeroed_memory = + u_suballocator_create(&sctx->b.b, sscreen->info.gart_page_size, + 0, PIPE_USAGE_DEFAULT, 0, true); + if (!sctx->b.allocator_zeroed_memory) + goto fail; + + sctx->b.b.stream_uploader = u_upload_create(&sctx->b.b, 1024 * 1024, + 0, PIPE_USAGE_STREAM, + R600_RESOURCE_FLAG_READ_ONLY); + if (!sctx->b.b.stream_uploader) + goto fail; + + sctx->b.b.const_uploader = u_upload_create(&sctx->b.b, 128 * 1024, + 0, PIPE_USAGE_DEFAULT, + R600_RESOURCE_FLAG_32BIT | + (sscreen->cpdma_prefetch_writes_memory ? + 0 : R600_RESOURCE_FLAG_READ_ONLY)); + if (!sctx->b.b.const_uploader) goto fail; + sctx->b.cached_gtt_allocator = u_upload_create(&sctx->b.b, 16 * 1024, + 0, PIPE_USAGE_STAGING, 0); + if (!sctx->b.cached_gtt_allocator) + goto fail; + + sctx->b.ctx = sctx->b.ws->ctx_create(sctx->b.ws); + if (!sctx->b.ctx) + goto fail; + + if (sscreen->info.num_sdma_rings && !(sscreen->debug_flags & DBG(NO_ASYNC_DMA))) { + sctx->b.dma_cs = sctx->b.ws->cs_create(sctx->b.ctx, RING_DMA, + (void*)si_flush_dma_cs, + sctx); + } + if (sscreen->info.drm_major == 3) sctx->b.b.get_device_reset_status = si_amdgpu_get_reset_status; |