1 files changed, 15 insertions, 15 deletions

diff --git a/src/gallium/drivers/radeonsi/si_compute.c b/src/gallium/drivers/radeonsi/si_compute.c
index f5b11bfd298..1a62b3e0844 100644
--- a/src/gallium/drivers/radeonsi/si_compute.c
+++ b/src/gallium/drivers/radeonsi/si_compute.c
@@ -308,7 +308,7 @@ static void si_set_global_binding(
 		uint64_t va;
 		uint32_t offset;
 		pipe_resource_reference(&program->global_buffers[first + i], resources[i]);
-		va = r600_resource(resources[i])->gpu_address;
+		va = si_resource(resources[i])->gpu_address;
 		offset = util_le32_to_cpu(*handles[i]);
 		va += offset;
 		va = util_cpu_to_le64(va);
@@ -378,7 +378,7 @@ static bool si_setup_compute_scratch_buffer(struct si_context *sctx,
 		scratch_bo_size = sctx->compute_scratch_buffer->b.b.width0;
 
 	if (scratch_bo_size < scratch_needed) {
-		r600_resource_reference(&sctx->compute_scratch_buffer, NULL);
+		si_resource_reference(&sctx->compute_scratch_buffer, NULL);
 
 		sctx->compute_scratch_buffer =
 			si_aligned_buffer_create(&sctx->screen->b,
@@ -398,7 +398,7 @@ static bool si_setup_compute_scratch_buffer(struct si_context *sctx,
 		if (si_shader_binary_upload(sctx->screen, shader))
 			return false;
 
-		r600_resource_reference(&shader->scratch_bo,
+		si_resource_reference(&shader->scratch_bo,
 		                        sctx->compute_scratch_buffer);
 	}
 
@@ -582,7 +582,7 @@ static void si_setup_user_sgprs_co_v2(struct si_context *sctx,
 			AMD_CODE_PROPERTY_ENABLE_SGPR_DISPATCH_PTR)) {
 		struct dispatch_packet dispatch;
 		unsigned dispatch_offset;
-		struct r600_resource *dispatch_buf = NULL;
+		struct si_resource *dispatch_buf = NULL;
 		uint64_t dispatch_va;
 
 		/* Upload dispatch ptr */
@@ -620,7 +620,7 @@ static void si_setup_user_sgprs_co_v2(struct si_context *sctx,
 		radeon_emit(cs, S_008F04_BASE_ADDRESS_HI(dispatch_va >> 32) |
                                 S_008F04_STRIDE(0));
 
-		r600_resource_reference(&dispatch_buf, NULL);
+		si_resource_reference(&dispatch_buf, NULL);
 		user_sgpr += 2;
 	}
 
@@ -651,7 +651,7 @@ static bool si_upload_compute_input(struct si_context *sctx,
 {
 	struct radeon_cmdbuf *cs = sctx->gfx_cs;
 	struct si_compute *program = sctx->cs_shader_state.program;
-	struct r600_resource *input_buffer = NULL;
+	struct si_resource *input_buffer = NULL;
 	unsigned kernel_args_size;
 	unsigned num_work_size_bytes = program->use_code_object_v2 ? 0 : 36;
 	uint32_t kernel_args_offset = 0;
@@ -704,7 +704,7 @@ static bool si_upload_compute_input(struct si_context *sctx,
 		                S_008F04_STRIDE(0));
 	}
 
-	r600_resource_reference(&input_buffer, NULL);
+	si_resource_reference(&input_buffer, NULL);
 
 	return true;
 }
@@ -724,12 +724,12 @@ static void si_setup_tgsi_user_data(struct si_context *sctx,
 
 	if (info->indirect) {
 		if (program->uses_grid_size) {
-			uint64_t base_va = r600_resource(info->indirect)->gpu_address;
+			uint64_t base_va = si_resource(info->indirect)->gpu_address;
 			uint64_t va = base_va + info->indirect_offset;
 			int i;
 
 			radeon_add_to_buffer_list(sctx, sctx->gfx_cs,
-					 r600_resource(info->indirect),
+					 si_resource(info->indirect),
 					 RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT);
 
 			for (i = 0; i < 3; ++i) {
@@ -832,10 +832,10 @@ static void si_emit_dispatch_packets(struct si_context *sctx,
 	}
 
 	if (info->indirect) {
-		uint64_t base_va = r600_resource(info->indirect)->gpu_address;
+		uint64_t base_va = si_resource(info->indirect)->gpu_address;
 
 		radeon_add_to_buffer_list(sctx, sctx->gfx_cs,
-		                 r600_resource(info->indirect),
+		                 si_resource(info->indirect),
 		                 RADEON_USAGE_READ, RADEON_PRIO_DRAW_INDIRECT);
 
 		radeon_emit(cs, PKT3(PKT3_SET_BASE, 2, 0) |
@@ -903,9 +903,9 @@ static void si_launch_grid(
 
 		/* Indirect buffers use TC L2 on GFX9, but not older hw. */
 		if (sctx->chip_class <= VI &&
-		    r600_resource(info->indirect)->TC_L2_dirty) {
+		    si_resource(info->indirect)->TC_L2_dirty) {
 			sctx->flags |= SI_CONTEXT_WRITEBACK_GLOBAL_L2;
-			r600_resource(info->indirect)->TC_L2_dirty = false;
+			si_resource(info->indirect)->TC_L2_dirty = false;
 		}
 	}
 
@@ -937,8 +937,8 @@ static void si_launch_grid(
 
 	/* Global buffers */
 	for (i = 0; i < MAX_GLOBAL_BUFFERS; i++) {
-		struct r600_resource *buffer =
-			r600_resource(program->global_buffers[i]);
+		struct si_resource *buffer =
+			si_resource(program->global_buffers[i]);
 		if (!buffer) {
 			continue;
 		}